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IN THE UNITED STATES DISTRICT COURT FOR THE DISTRICT OF DELAWARE PROMOS TECHNOLOGIES, INC., Plaintiff, v. FREESCALE SEMICONDUCTOR, INC., Defendant. ) ) ) ) ) ) ) ) ) )

C.A. No. 06-788 (JJF)

FREESCALE'S ANSWERING CLAIM CONSTRUCTION BRIEF MORRIS, NICHOLS, ARSHT & TUNNELL LLP Mary B. Graham (#2256) James W. Parrett, Jr. (#4292) 1201 N. Market Street P.O. Box 1347 Wilmington, DE 19899-1347 302.658.9200 OF COUNSEL: David L. Witcoff Kevin P. Ferguson John M. Michalik JONES DAY 77 West Wacker Chicago, IL 60601-1692 312.782.3939 F. Drexel Feeling Karl M. Maersch JONES DAY North Point 901 Lakeside Avenue Cleveland, OH 44114-1190 216.586.3939 Dated: November 20, 2007 Attorneys for Freescale Semiconductor, Inc.

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TABLE OF CONTENTS Page TABLE OF AUTHORITIES INTRODUCTION THE FORTIN PATENT I. DEPOSITION TERMS (PVD, CVD, AND SPUTTERING) A. B. C. II. The Fundamental Concepts of PVD and CVD The Inter-Relationships of PVD, CVD and Sputtering Sputtering iv 1 2 2 2 7 8 10 11 11 12 14 15 16 17

ROUNDING

THE CHAN PATENTS I. CHAN TERMS IN WHICH PROMOS'S GOAL IS TO AVOID THE "CHIP" LIMITATION A. B. C. D. E. F. Chan's Invention Is Not Applicable To An Internal Cache The Chan Claims Are Directed To Cache Memory External To A Processor The Specification Describes "The Invention" As An External Cache Chip The Chan Prosecution History Limited The Invention To External Chips The Advantages Of The Chan Patents Cannot Be Met By An Internal Cache A Person Of Ordinary Skill In The Art Would Recognize That Chan's Cache Chip, Controller Chip, Processor Bus, System Bus And System Memory Were All External To The Microprocessor Chan Did Not Enable Internal Caches CHAN CLAIM CONSTRUCTIONS

18 20 21

G. H.

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1. 2. 3. 4. II.

"cache memory apparatus" / "cache memory" `709 claims 1, 13, 17, 22 and `241 claims 1, 15, 16 "cache controller" / "controller" - `241 claims 1, 15 and 16 "system memory" - `241 claims 1, 15 and 16 "host processor" / "host" / "host microprocessor" `241 claims 1, 10, 15, 16

21 23 24 25

TERMS IN WHICH PROMOS'S GOAL IS TO PRESERVE AN ABILITY TO TWIST ITS CLAIM CONSTRUCTIONS AT TRIAL A. Port Terms ­ Doorway To The Chips 1. 2. 3. B. "host port" and "system port" - `709 claims 1, 13, 17, 22 and `241 claims 1, 10, 16 "first port" and "second port" - `241 claims 1 and 16 "dual port cache memory" - `241 claims 1, 15 and 16

25 27 28 29 30 30 30 31 31 32

Bus Terms ­ Highway Between The Chips 1. 2. "host address bus" - `241 claims 1, 15, 16 "host data bus" - `241 claims 1, 15, 16

C. D. E.

"buffering" - `709 claims 1, 13 & 22 and `241 claim 1 "selectively providing" - `709 Claims 1, 13, 17 and 22 "selectively providing the first data to one of said random access memory, said system port, and said random access memory and said system port" -'709 Claim 1 "at the same time" - `709 Claim 13 and 22

32 33 33 33 34

F. III.

TERMS IN WHICH PROMOS'S GOAL IS TO AVOID CONFRONTING INDEFINITENESS ISSUES A. B. "register" terms "operably decoupled" - `241 claim 1

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C. D.

"operations at said system port to be decoupled from said random access memory" - `709 claims 17 and 22 "buffering and selective provision of data to and from said cache storage locations by said plurality of registers" - 241 claim 1 Indefinite Means-Plus-Function Terms 1. 2. Presumptive means-plus-function terms Non-presumptive means-plus-function terms

35

36 36 36 39 40

E.

CONCLUSION

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TABLE OF AUTHORITIES CASES Alloc, Inc. v. Int'l Trade Comm'n, 342 F.3d 1258 (Fed. Cir. 2003) Applied Sci. & Tech., Inc. v. Advanced Energy Indus., Inc., 204 F. Supp. 2d 712 (D. Del. 2002) AquaTex Indus., Inc. v. Techniche Solutions, 419 F.3d 1374 (Fed. Cir. 2005) Atmel Corp. v. Info. Storage Devices. Inc., 198 F.3d 1374 (Fed. Cir. 1999) Bayer Healthcare LLC v. Abbott Labs., 2005 WL 2346890 (D. Del. Sept. 26, 2005) Bell Atl. Network Servs., Inc. v. Covad Commc'ns Group, Inc., 262 F.3d 1258 (Fed. Cir. 2001) Biomedino, LLC v. Waters Techs. Corp., 490 F.3d 946 (Fed. Cir. 2007) Budde v. Harley-Davidson, Inc., 250 F.3d 1369 (Fed. Cir. 2001) Chimie v. PPG Indus., Inc., 402 F.3d 1371 (Fed. Cir. 2005) CVI/Beta Ventures, Inc. v. Tura LP, 112 F.3d 1146 (Fed. Cir. 1997) Default Proof Credit Card Sys. v. Home Depot U.S.A., Inc., 412 F.3d 1291 (Fed. Cir. 2005) Gentry Gallery, Inc. v. Berkline Corp., 134 F.3d 1473 (Fed. Cir. 1998) Graco, Inc. v. Binks Mfg., 60 F.3d 785 (Fed. Cir. 1995) Honeywell Int'l, Inc. v. Int'l Trade Comm'n, 341 F.3d 1332 (Fed. Cir. 2003) Innova/Pure Water, Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111 (Fed. Cir. 2004) PAGE(S) 15 8 15 37 8 15, 24, 32 39 37, 39 16 14 39 21 26 34 34-35

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Innovad Inc. v. Microsoft Corp, 260 F.3d 1326 (Fed. Cir. 2001) Laitram Corp. v. Morehowe Indus., Inc., 143 F.3d 1456 (Fed. Cir. 1998) Markman v. Westview Instruments, Inc., 52 F.3d 967 (Fed. Cir. 1995) Merrill v. Yeomans, 94 U.S. 568 (1876) Morton Int'l. Inc. v. Cardinal Chem. Co., 5 F.3d 1464 (Fed. Cir. 1993) Netword, LLC v. Centraal Corp., 242 F.3d 1347 (Fed. Cir. 2001) Nystrom v. Trex Co., 424 F.3d 1136 (Fed. Cir. 2005) PC Connector Solutions LLC v. SmartDisk Corp., 406 F.3d 1359 (Fed. Cir. 2005) Phillips v. AWH Corp., 415 F.3d 1303 (Fed. Cir. 2005) Power Integrations, Inc. v. Fairchild Semiconductor Int'l, Inc., 422 F. Supp. 2d 446 (D. Del. 2006) Reiffin v. Microsoft Corp., 214 F.3d 1342 (Fed. Cir. 2000) Renishaw PLC v. Marposs Societa' Per Azioni, 158 F.3d 1243 (Fed. Cir. 1998) SciMed Life Sys., Inc. v. Advanced Cardiovascular Sys., Inc., 242 F.3d 1337 (Fed. Cir. 2001) Seachange Int'l, Inc. v. C-Cor Inc., 413 F.3d 1361 (Fed. Cir. 2005) Sulzer Textil A.G. v. Picanol N.V., 358 F.3d 1356 (Fed. Cir. 2004) Toro Co. v. Deere & Co., 355 F.3d 1313, 1319 (Fed. Cir. 2004)

24 24 26 11, 15 35 23 15, 17 22 Passim 40 21 7 23 16 26 26

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Union Oil Co. v. Atlantic Richfield Co., 208 F.3d 989 (Fed. Cir. 2000) Vas-Cath, Inc. v. Mahurkar, 935 F.2d 1555 (Fed. Cir. 1991) Wang Laboratories, Inc. v. America Online, Inc., 197 F.3d 1377 (Fed. Cir. 1999) Winn, Inc. v. King Par Corp., 2005 WL 2033531 (E.D. Mich. Aug. 16, 2005) STATUTES 35 U.S.C. § 112 ¶ 1 35 U.S.C. § 112 ¶ 2 35 U.S.C. § 112 ¶ 6

14 21 20 8

21 39-40 37, 39-40

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INTRODUCTION The parties have taken markedly different approaches to construing the claim terms of the Fortin and Chan patents. As required by the Federal Circuit, Freescale looks to the evidence of what the inventors intended, as reflected in the intrinsic evidence (the patent claims, the patent specification and the file histories ­ i.e., the inventors' own words in describing their inventions and in distinguishing those inventions from the prior art). ProMOS, by contrast, often relies on unsupported attorney argument and rhetoric rather than evidence, and when it relies on evidence at all, ProMOS largely ignores the inventors' words, instead resorting blindly to dictionary definitions. As demonstrated in its opening brief and below, Freescale's approach is the correct one and its constructions should be adopted. Before turning to the substantive arguments in detail, we note that ProMOS devotes considerable space in its opening brief to ad hominem attacks and the imputation of improper motives to Freescale. Yet what ProMOS's criticisms come down to is that Freescale ultimately agreed that various initially-identified claim terms did not need to be construed and that Freescale tried to reduce further the burden of claim construction by attempting to reach compromise constructions with ProMOS. Plainly, ProMOS's attacks are unwarranted, as all Freescale did is meet its obligation to meet and confer. ProMOS's attacks also are ironic

because it did not attempt to compromise on a single construction, and it added at the last minute a number of brand new constructions (for terms where ProMOS previously had refused to provide any constructions) and modified many other of its previously proposed constructions shortly before the parties' opening briefs were due. Unlike ProMOS, Freescale chose not to complain about these last-minute changes because complaining does not help the Court resolve the construction issues, and the parties were in fact able to manage each other's changes. But ProMOS's charges should be seen for what they are: the pot calling the kettle black. -1-

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THE FORTIN PATENT Freescale's constructions rely on the well-established meanings of claim terms clearly adopted by Fortin, as shown by his description of his invention, his use of the terminology in the specification and claims, and his explicit statements about the meaning of the terms during prosecution to overcome the prior art. In contrast, ProMOS relies on portions of a single prior art reference cited in the Fortin patent, without regard to Fortin's limited purpose in citing it for certain examples, the understanding of those skilled in the art or Fortin's own expressions about his invention in the prosecution history. Freescale submits that only its approach comports with the law governing claim construction and is the approach the Court should adopt. I. DEPOSITION TERMS (PVD, CVD, AND SPUTTERING) The parties' dispute over the meaning of the deposition terms of the Fortin patent (PVD, CVD and sputtering) involves two aspects: (1) the affirmative characteristics that should be included in each of the definitions (and how clearly they should be stated); and (2) whether the inter-relationships of those terms should be made clear, and in particular, that PVD and CVD are mutually exclusive and that sputtering is a form of PVD. A. The Fundamental Concepts of PVD and CVD

As Freescale's opening brief explained, three central concepts should be included in the definitions of PVD and CVD: (i) the building up of material (i.e., the notion of "deposition"); (ii) the involvement of vapor; and (iii) the mechanism of action (DI 85 at 4, 10). Freescale cited intrinsic evidence showing what Fortin meant by PVD and CVD (including these concepts), as well as references in the art confirming that Fortin's descriptions are consistent with the ordinary meanings of these terms (id. at 4, 7-8, 10-13). Freescale's proposed definitions essentially adopt Fortin's descriptions of these claim terms in the prosecution and their incorporation of those three concepts:

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PHYSICAL VAPOR DEPOSITION Freescale's Definition A process of building up material on a surface in which the material to be deposited is released from a source of the material into a vapor phase by one or more physical mechanisms. Chemical vapor deposition is not physical vapor deposition or a type of physical vapor deposition. Fortin's Description "[A] general term for a deposition process in which the material to be deposited is released from the source of the material largely by one or more physical mechanisms." "CVD is not PVD or a type of PVD." DI 86, Ex. H at 9 CHEMICAL VAPOR DEPOSITION Freescale's Definition A process of building up material on a surface in which a vapor formed with one or more chemical species that contain the material to be deposited, or components of the material to be deposited, undergoes suitable chemical reaction that enables the material being deposited to be released from the starting chemical species and accumulate on the deposition surface. Chemical vapor deposition is not physical vapor deposition or a type of physical vapor deposition. Fortin's Description "[A] deposition process in which a vapor formed with one or more chemical species that contain the material to be deposited, or components of the material to be deposited, undergoes suitable chemical reaction that enables the material being deposited to be released from the starting chemical species and accumulate on the deposition surface." "CVD is not PVD or a type of PVD." DI 86, Ex. H at 9 ProMOS's Definition A process in which films are precipitated from the gas phase by a chemical reaction. ProMOS's Definition A process in which films are deposited atomically by means of fluxes of individual neutral or ionic species.

ProMOS's definitions simply ignore the inventor's own descriptions of what his claim terms encompass, and ProMOS's brief does not attempt to support its definitions from that standpoint or from what is generally understood in the art. Instead, ProMOS would support its definitions by quoting a reference cited in the Fortin specification, a handbook edited by Nishi (DI 84 at 35). Specifically, ProMOS argues that, "[t]he specification expressly states that the invention `is applicable to TiN deposited by physical vapor deposition techniques' and by incorporating by reference the chapter of the handbook that related to PVD (pages 395-413) the

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inventor left no room for doubt as to the proper definition of PVD" (DI 84 at 35). ProMOS does not otherwise rely on any statements from the intrinsic record about PVD or CVD. ProMOS's argument that the inventor was relying on a chapter in the Nishi Handbook for definitions of PVD and CVD, and indeed that he "left no room for doubt," fails to closely analyze the patent and the limited propositions for which Fortin cited Nishi. The patent cites it in three places: (1) early in the Background section for the proposition that TiN is a barrier layer to the tungsten layer (1:17-24); (2) later as background for the fact that sputtering is "less complex and costly" than CVD for deposition of TiN (1:42-44); and (3) at the end of the specification (after describing the preferred embodiment) when elaborating on additional embodiments (4:4956). The first citation is not addressed to deposition processes at all. The second is limited to Fortin's conclusion about relative cost and complexity of sputtering versus CVD, without characterizing either process technically. Fortin's third citation, which is the one relied on by ProMOS, is made to support specific examples of "physical vapor deposition techniques other than sputtering" for depositing TiN. The specific citation by Fortin (4:49-56) is: The invention is not limited to any particular sputtering process, and further is applicable to TiN deposited by physical vapor deposition techniques other than sputtering. For example, pulsed laser deposition and other evaporation techniques can be used. See `Handbook of Semiconductor Manufacturing Technology' (2000), cited above, pages 395-413, incorporated herein by reference. But referring the reader of the patent to a reference for information on specific examples is not the same as relying on it for the underlying definitions of specific terms, here PVD and CVD. Had Fortin intended to rely on the Nishi Handbook for definitions, then presumably he would have cited specifically to descriptive statements, and in a way to make such an intent clear, such as when introducing the terms or explaining their relationship to his invention. For example, Fortin stated at the outset that, "The present invention relates to the physical vapor -4-

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deposition of titanium nitride" (1:8-9), which would have been a logical place for him to cite specific passages of Nishi, which he did not do, had he intended to rely on it to define PVD. To the contrary, leaving no doubt about what he meant, Fortin gave his own descriptions of the terms PVD and CVD in the prosecution (Ex. H to DI 86 at 9 and quoted above), which are different from the descriptions in the cited chapter of the Nishi Handbook. Fortin's descriptions were the descriptions that the Patent Office relied upon in deciding to issue the Fortin patent. 1 Arguing that the Court should not adopt Freescale's definitions (based on Fortin's words) of PVD and CVD, ProMOS asserts that Freescale ignores the "essential concept" of flux by omitting from PVD the purported notion of "an overall net `flux' of individual species" (DI 84 at 35) and from CVD, that there is no "preferred direction of flux" (DI 84 at 37). Not only will ProMOS's construction baffle the jury (what is "flux"? what is flux's "direction"?), it is not supported. "Overall net flux" as required for PVD is ProMOS's made-up interpretation and ProMOS does not cite any place in the chapter (or elsewhere) where that interpretation is supported. Similarly, ProMOS, not the chapter's author (S. M. Rossnagel), says that "preferred direction of flux" distinguishes PVD from CVD and ProMOS again does not cite support. Notably, Rossnagel makes clear in a subsequent publication that ProMOS's interpretation of Rossnagel's description of PVD as requiring directional flux (and as a distinguishing feature

1

The only differences between Freescale's definitions of PVD and CVD and Fortin's descriptions in the prosecution are: (a) Fortin said that release of material in PVD is "largely" by physical mechanisms; and (b) Freescale has made explicit the points that material is built up in a deposition process and that a vapor is involved in PVD. It is not clear why Fortin hedged with the word "largely," as PVD clearly requires that the mechanism for releasing material be physical. The examples of PVD cited by Fortin in the patent (sputtering, pulsed laser, and other evaporative techniques) involve only a physical mechanism as the chapter of Nishi cited by Fortin makes clear (4:49-56). The requirement that a deposition process build up or accumulate material would make clear to a jury the basic point of a deposition process. That a vapor is involved in PVD is also basic, as previously discussed.

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between PVD and CVD) is wrong. Although he describes evaporation as one PVD method of directionally controlling the flux, Rossnagel emphasizes that sputter deposition, which he characterizes as a PVD method, is nondirectional (Ex. K at S86): 2 Sputter deposition, by comparison, is almost always in a very nondirectional deposition configuration. . . . The result is that sputter deposition of atoms results in arrival directions for the depositing atoms which range from near-normal incidence to grazing . . . .3 ProMOS apparently does not dispute that, in PVD and CVD as with other deposition processes, material must be built up, as Freescale's definition explicitly states. Yet ProMOS's definitions would deliberately obscure that point, apparently so that ProMOS may later argue otherwise. Further, ProMOS's definition of PVD omits the fundamental requirement that the mechanism of release from the starting material must be physical, instead focusing on a general notion of how material, after having been released, is deposited ("atomically by means of fluxes of individual neutral or ionic species"). That notion, however, applies as well to CVD and so does not distinguish the term PVD from CVD (as Fortin had to do to obtain his patent over the

2

3

ProMOS argues (DI 84 at 36) that the definition of PVD as Freescale originally proposed it, which had an additional sentence, would have read out the preferred embodiment of so-called "reactive sputtering." That issue is irrelevant (as well as moot) as Freescale has not argued for a construction that would rule out reactive sputtering. Reactive sputtering is a form of sputtering in which a solid titanium target is bombarded to physically dislodge surface atoms of titanium into a vapor phase including nitrogen ambient for subsequent accumulation on the deposition surface. As noted in Freescale's opening brief, sputtering is unquestionably a form of PVD and Freescale's definition includes sputtering (DI 85 at 14-15). Rossnagel also gave a more comprehensive explanation of PVD which comports with Fortin's, its customary meaning and Freescale's definition (Ex K at S74): Typically these atoms are removed from a solid or liquid source, transit an evacuated chamber, and impinge on a solid surface at which point the atoms stick and form a film. The means to remove the atoms from the original source can be by thermal heating of the source [evaporation] or energetic particle bombardment by electrons, atoms, ions, molecules, or photons.

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prior art).4 Only Freescale's definition accounts for the essential aspects of the respective processes: in the customary understanding of the term PVD, material is physically released into vapor form before being deposited and, in CVD, a vapor undergoes a chemical reaction that enables the material being deposited to be released from its starting chemical species and accumulate on the surface. All these concepts are critical and should be reflected in the

definitions of PVD and CVD that the Court adopts. B. The Inter-Relationships of PVD, CVD and Sputtering

ProMOS argues that it is "circular" and "backwards" (DI 84 at 35, 37) to include in the definitions of PVD and CVD the inter-relationship of the terms, i.e. that the two terms are mutually exclusive. But the point of the claim construction exercise is to construe the claim terms as the inventor meant them so that, when the jury (or the Court) applies the claims for purposes of infringement and invalidity, the inventor's intent is made clear. Phillips v. AWH Corp., 415 F.3d 1303, 1316 (Fed. Cir. 2005); see also Renishaw PLC v. Marposs Societa' Per Azioni, 158 F.3d 1243, 1250 (Fed. Cir. 1998) ("[T]he interpretation to be given a term can only be determined and confirmed with a full understanding of what the inventors actually invented and intended to envelop with the claim."). Here, clarifying the relationship of PVD and CVD was important to the inventor to obtain his patent. To distinguish his invention from the patent to Fiordalice, Fortin argued that After noting the

Fiordalice deposits TiN by CVD whereas Fortin deposits TiN by PVD.

important differentiating characteristics of the two processes (incorporated in Freescale's definitions), Fortin made a final clarifying point to be absolutely sure that there could be no
4

The statement that material is deposited "atomically by means of fluxes of individual neutral or ionic species" does not differentiate PVD from CVD. Depositing "atomically" simply means one atom at a time; neutral and ionic species are the only possibilities.

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doubt about the distinction: "In any event, CVD is not PVD or a type of PVD" (DI 86, Ex. H at 9) (original emphasis). Given Fortin's belief that this degree of clarity was necessary for the examiner to fully understand the terms and how his invention differed from the prior art, then that degree of clarity is just as important now to help the jury. There can be no legitimate reason not to include that unequivocal clarification in the claim constructions. Contrary to ProMOS's assertion (DI 84 at 35-36), there is nothing improper about including in a definition what the term is not. This Court has done so. Bayer Healthcare LLC v. Abbott Labs., 2005 WL 2346890 at *9 (D. Del. Sept. 26, 2005) ("gear" construed as a "toothed machine part, such a wheel or cylinder, that meshes with another toothed part, to transmit motion or to change speed or direction, and which excludes a chain."); Applied Sci. & Tech., Inc. v. Advanced Energy Indus., Inc., 204 F. Supp. 2d 712, 715 (D. Del. 2002).5 In Bayer, "Bayer clearly and unmistakably distinguished chains from gears." Bayer at *9. Fortin too "clearly and unmistakably distinguished [PVD] from [CVD]" and the construction of the terms should therefore reflect that unmistakable distinction. C. Sputtering

ProMOS asserts that Freescale's definition is incorrect in placing sputtering as one type of PVD (DI 84 at 39). Asserting that "the sputtering process is characterized by the removal of material" (id.), ProMOS is clearly trying to preserve the notion that "sputtering" as used by Fortin could include a process that is an etch (e.g. one not intended to build up material, but instead to remove material). This is contrary to the explicit claim language and makes no sense. Sputtering is used in claims 2, 32, 48, and 54, where it depends from limitations requiring
5

ProMOS's reliance on Winn, Inc. v. King Par Corp., 2005 WL 2033531 (E.D. Mich. Aug. 16, 2005) is misplaced. Although that court did not include a negative in a definition (i.e., what the term did not include), the inventor had not relied in the prosecution on a negative to distinguish the term from things that were not the invention. Here Fortin did.

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PVD. Thus, there can be no question that sputtering as used in those dependent claims is a type of PVD. In independent claim 25, sputtering is used to form the TiN layer and PVD is not explicitly referenced. However, not only should sputtering be read the same way in all the claims, Phillips, 415 F.3d at 1314, but the entire point of sputtering in claim 25 is to form a layer, not to remove one that is already there (6:35-37: "forming a titanium nitride layer over the titanium layer . . . the titanium nitride layer being formed by sputtering"). Although it is correct that sputtering connotes particular aspects of the front end of the process (i.e., the particular way material to be deposited is physically removed from the starting material ­ by bombarding the starting material as opposed to, for example, evaporation which is also a physical mechanism), and to that extent characterizes sputtering, unquestionably Fortin was using the term as a type of PVD.6 Not only is that usage clear in the claims, but he emphasized in the specification that sputtering is a form of PVD: "The invention is not limited to any particular sputtering process, and further is applicable to TiN deposited by physical vapor deposition techniques other than sputtering" (DI 86, Ex. A at 4:49-52) (emphasis added). And during prosecution, he stated, "[e]xamples of PVD include sputtering . . ." and "sputter deposition is a type of PVD" (DI 86, Ex. H at 9, 10; see also id. at 11). Ignoring Fortin's clear statements, ProMOS argues that its construction, which omits that sputtering is a deposition process (and indeed a type of PVD), is correct because its "definition is taken directly from" the Rossnagel chapter of Nishi (DI 84 at 38). ProMOS is wrong. As noted above (pp. 4-5), Fortin did not rely on the Rossnagel chapter as providing a definitional
6

"Sputtering" is a term that requires some context, as it is sometimes used in the context of an etch process (a "sputter etch") to clean a surface by removing material (see Ex. L at 108) (Exhibit L is a portion of a reference authored by Wolf, a page of which was cited in the patent, 3:54-55). But in this case, Fortin was clearly using the term as a deposition process, as made clear by the cites above and below.

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description. Moreover, ProMOS's definition is only part of what Rossnagel says. ProMOS omits Rossnagel's statement that, "[t]he sputtered atoms must then move through the background gas to land at the desired sample surface," in other words, that he is referring to more than simply a removal process as ProMOS would define sputtering (DI 84, Ex. 10 at 397). Thus, "sputtering" should be construed as "a type of physical vapor deposition in which a solid target is bombarded with high energy ions physically to dislodge the surface atoms on the target into a vapor phase for accumulation on the deposition surface without undergoing a chemical reaction." II. ROUNDING ProMOS's exact argument on "rounding" is unclear, but seems to be that "rounding" is understood with reference to the "rounded edge shown in Figure 5" of the patent, and is determined not by a measurement but rather by use of particular plasma etch process parameters described in the patent (DI 84 at 34). Specifically, ProMOS refers to the result of milling away (i.e. etching) as "rounding" and then ties "rounding" in Figure 5 to the specific process described for the plasma etch: "One of ordinary skill in the art readily understands that exposing the silicon dioxide dielectric layer 110 to RF plasma in an argon atmosphere for 10 seconds produces exactly the type of rounded edge that is shown in Figure 5" (id.). But this assertion is mere lawyer argument, as ProMOS fails to explain or support how one of ordinary skill in the art would be led to make this connection, and how its reading would allow generalization such that a competitor who carried out different etch parameters would understand the term and know whether what it did infringes. Notably, ProMOS does not argue that "rounding" should be defined as the result of a process using an etch with the particular parameters it cites. Accordingly, the term should be held to be insolubly indefinite.

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THE CHAN PATENTS Freescale's constructions for each of the disputed Chan patent claim terms adhere to the methodology mandated by the Federal Circuit in Phillips, 415 F.3d at 1313-17. Freescale's proposed constructions are supported by the intrinsic record -- the claims, specifications, and prosecution histories. ProMOS's constructions, in contrast, largely ignore the specification and completely ignore the prosecution histories, contrary to Phillips. Id. Instead, ProMOS relies on extrinsic evidence and, mostly, unsupported lawyer argument. ProMOS understandably wants to avoid the context of the Chan patents because it needs to in order to seek constructions that go far beyond anything that Chan actually invented. However, "[t]he patent system is based on the proposition that claims cover only the invented subject matter." Id. at 1321 (citing Merrill v. Yeomans, 94 U.S. 568, 573-74 (1876)). ProMOS has three claim construction goals: (1) avoiding the "chip" limitation that is applicable to all claims; (2) preserving an ability to twist claim constructions at trial when presenting its infringement case to the jury; and (3) avoiding the indefinite terms that doom many of the Chan claims. Each fails under established law. I. CHAN TERMS IN WHICH PROMOS'S GOAL IS TO AVOID THE "CHIP" LIMITATION Although there are various key points in dispute, a major point of contention -- and one whose resolution will drive a number of claim constructions -- is whether Chan's invention covers products where the only cache that is used is one that is internal (as opposed to external) to a microprocessor. As demonstrated in Freescale's opening brief, and below, Chan described and claimed a particular system which used an external cache and an external cache controller to accelerate the microprocessor's overall performance. See DI 85 at 25-32.

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Indeed, the problem Chan was trying to solve is exacerbated by the use of internal caches. Chan's precise solution therefore was to have the microprocessor use a particular external cache, the Chan cache chip, and to use the external Chan cache in a certain way, so that the microprocessor did not have to wait to provide or obtain information from the system memory before it could continue performing its operations. Because Chan's invention has no applicability to internal cache-only situations, the claim language, all embodiments in the specification, and the file histories -- in short, all of the intrinsic evidence -- describe Chan's invention as being a system that uses only an external cache. Indeed, there is not a single piece of intrinsic evidence where Chan describes his invention as using a cache or cache controller that is on the same chip as (i.e., internal to) the microprocessor. A. Chan's Invention Is Not Applicable To An Internal Cache

The Chan patents address how quickly a microprocessor can access (i.e., send data to ("write") or obtain data from ("read")) the slower system (or "main") memory that is external to (i.e., not on the same chip as) the microprocessor. (`709 at 3:64-68.) A microprocessor

functions by obtaining data from system memory, internally processing that data, and outputting that processed data back to system memory. The microprocessor is capable of inputting or outputting data much faster (e.g., once per clock cycle) than system memory can provide or receive the data (e.g., once every several clock cycles). (`709 at 2:8-15.) Consequently, when the microprocessor is connected (or "coupled") directly to system memory, as illustrated in Fig. A below, it cannot input or output data as quickly as it is technologically capable. (Id.)

Instead, inputting and outputting can proceed only at the speed that system memory can provide

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or receive the data, which is only once every several clock cycles, causing the microprocessor to wait for the data input or output operation to complete before performing other operations. (Id.) Chan's solution to this problem is to disconnect (or "decouple") the microprocessor from the system memory (i.e., the direct connection between the microprocessor and system memory is broken). (`709 at 3:64-68.) As shown in Fig. B, the microprocessor is coupled directly to an external Chan cache chip which, in turn, is coupled to the system memory. (`709, Fig. 6-7, 32.)

The Chan invention allows the microprocessor to input or output data to the much faster external Chan cache at a faster rate (e.g., once every clock cycle) instead of the slower rate (e.g., once every several clock cycles) that would be required if the microprocessor were coupled directly to the system memory. (`709 at 73:7-16.) At the same time, data can be communicated between the external cache and the system memory along a different line ("system data bus") without affecting the speed at which the microprocessor can perform its operations. (`709 at 3:64-4:3.) As illustrated in Fig. C, if the Chan cache were internal to the microprocessor, as ProMOS's litigation-driven position now urges, the Chan solution of decoupling the microprocessor from the system memory could not be implemented, and Chan's objective of preventing the system memory from slowing down the microprocessor could not be achieved.

Instead, when the microprocessor, for example, had to send data to or get data from the system memory because that data had been processed or did not already exist in the internal cache, the

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microprocessor would be forced to slow down to operate only at the speed at which system memory could receive or provide the data, which is once every several clock cycles, rather than the much faster rate achievable when the Chan external cache is used to decouple the microprocessor from the system memory. Because the problem addressed by the Chan

invention, and the Chan solution to that problem, are both probative of the scope of the Chan claims, the Chan claims should be limited to cache memory chips and cache controller chips that are external to the microprocessor.7 B. The Chan Claims Are Directed To Cache Memory External To A Processor

The Chan claim language is directed to, and makes sense only in the context of, external cache memories. For example, claim 1 of the `709 patent (all the claims are similar in this regard) claims a "cache memory apparatus" with, inter alia, a host port (for communications between the cache and the microprocessor), a system port (for communications between the cache and the system memory) and a random access memory (for storing the data in the cache). As conceded by ProMOS at page 5 of its opening brief, the cache "acts as an intermediary between the host CPU [processor] and the system memory." (DI 84 at 5.) This "intermediary" must be external to the microprocessor because the cache contains a host port (akin to a doorway, as discussed below) for permitting data to exit the cache and get transmitted to the microprocessor and for permitting data from the microprocessor to enter the cache. There would be no need for a host port if the cache were internal to the microprocessor.
7

See CVI/Beta Ventures, Inc. v. Tura LP, 112 F.3d 1146, 1160 (Fed. Cir. 1997) ("In construing claims, the problem the inventor was attempting to solve, as discerned from the specification and the prosecution history, is a relevant consideration"); Union Oil Co. v. Atlantic Richfield Co., 208 F.3d 989, 996 (Fed. Cir. 2000) (affirming construction limiting claims to cover only ordinary automotive fuels, as opposed to fuels that could conceivably be used in automobiles, based on the specification's description of the problem addressed by the invention).

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C.

The Specification Describes "The Invention" As An External Cache Chip

As discussed in Freescale's Opening Brief at pp. 25-32 and 36-37, Chan consistently referred to his invention as a cache memory "chip" external to the microprocessor chip.8 Because Chan consistently described his patented cache memory as a memory chip, the claim terms "cache memory" and "cache memory apparatus" cannot encompass internal caches, which are not memory "chips." Claim terms should be construed commensurate with, and not broader than, the invention described in the intrinsic evidence. Bell Atl. Network Servs., Inc. v. Covad Commc'ns Group, Inc., 262 F.3d 1258, 1271 (Fed. Cir. 2001) ("[W]hen a patentee uses a claim term throughout the entire patent specification, in a manner consistent with only a single meaning, he has defined the term by implication." (internal quotations omitted)).9 According to the Supreme Court, and as recently reiterated by the Federal Circuit ­ "[t]he patent system is based on the proposition that claims cover only the invented subject matter." Phillips, 415 F.3d at 1321 (citing Merrill v. Yeomans, 94 U.S. 568, 573-74 (1876)). The Chan specification consistently and exclusively described his invention as using a cache memory chip and a cache controller chip external to the microprocessor. Chan was clear as to what he understood his invention to be. See id. at 1317. ProMOS cannot now improperly stretch the invention Chan described and claimed to include something that Chan nowhere invented or described in order to manufacture an infringement position.
8 9

Chan used the term "chip" to describe his invention over thirty times in the specification. See, e.g., Nystrom v. Trex Co., 424 F.3d 1136, 1142-45 (Fed. Cir. 2005) (limiting the claim term "board" to "wood decking materials cut from a log"); AquaTex Indus., Inc. v. Techniche Solutions, 419 F.3d 1374, 1380-82 (Fed. Cir. 2005) (limiting "fiberfill batting material" to synthetic materials, and excluding natural fibers, based on the language of the claims, written description, and prosecution history); Alloc, Inc. v. Int'l Trade Comm'n, 342 F.3d 1258, 1370-71 (Fed. Cir. 2003) (Limiting the invention to flooring panels with "play" because "the `907 specification read as a whole leads to the inescapable conclusion that the claimed invention must include play in every embodiment.").

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D.

The Chan Prosecution History Limited The Invention To External Chips

It is clear from the prosecution history that neither the cache memory nor the cache controller can be internal to the microprocessor. To persuade the Patent Office to issue his `241 patent over the prior art, Chan represented to the Patent Office that the cache controller, cache memory, microprocessor and system memory of his invention were separate and independent: The present invention relates to a computer system which includes a cache memory system and a cache controller which decouple a main memory subsystem from a host data bus. More specifically, the present invention, as set forth in independent claim 4 [issued claim 1], relates to a computer system which includes a host microprocessor, a system memory, a dual port cache memory and a cache controller. . . . The cache controller and the cache memory are connected in parallel between the host microprocessor and the system memory, thus allowing the host microprocessor to be decoupled from the system memory. (Ex. 22, `241 File History, Paper 12 at 9 (emphasis added).) In fact, it would be impossible for the structure that Chan described to be internal to the microprocessor--an internal cache controller or cache memory could not be connected in parallel between the microprocessor and system memory. Not only did Chan tell the patent office that the controller and cache memory had to be external, he also distinguished his invention from the prior art on that basis: Holland et al. does not disclose or suggest . . . connecting a cache controller and a cache memory in parallel between a host microprocessor and a system memory, thus allowing the host microprocessor to be decoupled from the system memory. (Id. at 11.) Having persuaded the Patent Office to issue his patent on this basis, Chan is estopped from "taking back" his representations now and arguing that the cache memory and cache controller can be internal to the microprocessor.10

10

Seachange Int'l, Inc. v. C-Cor Inc., 413 F.3d 1361, 1372-73 (Fed. Cir. 2005) ("Where an applicant argues that a claim possesses a feature that the prior art does not possess in order to overcome a prior art rejection, the argument may serve to narrow the scope of otherwise broad claim language."); Chimie v. PPG Indus., Inc., 402 F.3d 1371, 1384 (Fed. Cir. 2005) ("The purpose of consulting the prosecution history in construing the claim is to `exclude any interpretation that was disclaimed during prosecution.'").

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E.

The Advantages Of The Chan Patents Cannot Be Met By An Internal Cache

The Chan cache memory was designed to allow the microprocessor to operate over the host bus at its bus speed without having to wait for delays caused by the speed limitations of the system memory, and to allow the system memory to operate at its lower bus speed on the system data bus. (See `709 at 4:2-3; 73:7-12.) In that regard, the Chan specification provides a detailed discussion of several "advantages" of the Chan external cache memory system, which cannot be achieved with an internal cache: (1) simplifying computer system design by interfacing with Intel microprocessors in the same way that conventional SRAM chips interface with Intel microprocessors (`709 at 73:3-6); (2) decoupling external system memory from the microprocessor by decoupling buses external to the microprocessor (`709 at 73:7-12); (3) hiding system memory accesses from the microprocessor (`709 at 73:12-16); (4) allowing multiple Chan cache memory chips to be used in parallel to increase the number of bytes of data that can be sent to the microprocessor at a given time (`709 at 73:17-26); (5) providing particular architectural features that speed up microprocessor operations (`709 at 73:27-42); (6) allowing for microprocessor upgrade without changing the system memory design (`709 at 73:43-58); (7) providing particular architectural features that prevent slower system memory from slowing down the microprocessor (`709 at 73:66­74:3); (8) providing an architecture that allows for full use of the Intel 386 microprocessor features (`709 at 74:3-19); and (9) providing an architecture that allows for full use of the Intel 486 microprocessor features (`709 at 74:20-31). Where, as here, the advantages of the invention are unachievable without a particular limitation, the claims should be construed to include that limitation.11

11

Nystrom, 424 F.3d at 1143-45 (limiting "board" to only those boards cut from logs because stated advantage of reducing the amount of scrap in the outermost boards cut from a log was unachievable unless the board was cut from a log).

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F.

A Person Of Ordinary Skill In The Art Would Recognize That Chan's Cache Chip, Controller Chip, Processor Bus, System Bus And System Memory Were All External To The Microprocessor

The Chan patents disclose a cache controller chip and a cache memory chip designed for use in a particular computer system configuration with two specific microprocessors, the Intel 80486 and 80386, the only two microprocessors mentioned in the patent. As shown in Figure 11 below, the Intel computer system configuration contains a microprocessor, two buses that are external to the microprocessor (i.e., both a processor bus and a system bus) and system memory. (Ex. 3, at 1-9).12 This is the precise configuration described in the Chan patents.

As illustrated in the side-by-side comparison of Intel Figure 1-1 and Chan patent Figures 7 and 32, there is one-to-one correspondence between the devices in the Chan computer system
12

Chan submitted the Intel i486 Microprocessor Hardware Manual to the Patent Office as prior art to the Chan patents.

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figures and the devices in the "Typical i486 Processor System" depicted in Intel Figure 1-1.13 The CPU 60 of Figs. 7 and 32 correspond to the i486 Processor of Intel Figure 1-1. Similarly, the data 26, address 24, and control 64 buses of Figs. 7 and 32 correspond to the Processor Bus of the Intel figure. Likewise, the data 74, address, control 76, and system 34 buses of Figs. 7 and 32 correspond to the Intel System bus. Also, the MOSEL MS443 Dual Port Burst Memory Chip 72 of Fig. 32 and the cache memory chips 72A, 72B, 72C, and 72D of Fig. 7 correspond to the External Cache of the Intel figure. In addition, the MS 441 cache controller chip 70 of Fig. 32 and the controller chip 70 of Fig. 7 performs the functions of the upper Bus Controller of the Intel figure. Finally, chip set DRAM 61 of Fig. 32 corresponds to Memory in the Intel figure. The Intel reference manual reaffirms that the Processor Bus, System Bus, External Cache, Bus Controller and Memory are all separate from and external to the microprocessor. Figure 1-1, for example, specifically recites that the cache is an optional external component. The Intel reference manual, also, specifically instructs that the Processor Bus is connected to the pins on the microprocessor chip and therefore must be external to the microprocessor chip: The processor bus is the set of pinout signals on the i486 processor chip. It is the bus through which the processor communicates with other devices in the system. The signals on the bus are classed by their functions, which include . . . control, address and data (Ex. 3 at 3-1.) Because the other components interface with the Processor Bus and/or the External Cache, and not directly with the i486 microprocessor, they also must be external. A person of ordinary skill in the art, with knowledge of the prior art "Typical i486 Processor System" would easily recognize that the Chan patents are directed to that configuration, and would therefore conclude that the Chan patents are directed to a cache memory chip and a cache
13

The three Chan figures depicting the `241 patent computer system are Figs. 6, 7 and 32. Fig. 6 shows the system with a 386 microprocessor as the CPU, while Fig. 7 shows a 486.

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controller chip that are separate from and external to the microprocessor chip.14 G. Chan Did Not Enable Internal Caches

In support of its erroneous contention that the Chan invention is also applicable to internal caches, ProMOS relies on a statement in the Background of the Invention section that recognizes the non-remarkable fact that internal and external caches existed in the prior art. The Federal Circuit previously provided guidance for situations such as this. In Wang Laboratories, Inc. v. America Online, Inc., 197 F.3d 1377 (Fed. Cir. 1999), the Federal Circuit held that even though the language of the claims, read without reference to the specification, might be considered broad enough to encompass a feature in question, that feature is outside the reach of the claims when there is no written description or enablement of the feature -- even when the feature is mentioned in the Background of the Invention. In Wang, the parties agreed that in general usage the claim term "frame" could be applied both to "bit-mapped display systems" and to "character-based systems." Id. at 1381. The court, however, construed the claims as limited to character-based systems because the "only system that [was] described and enabled" in the patent specification "use[d] a character-based protocol." Id. at 1382. The court held that references to bit-mapped protocols in the "Background of the Invention" section were merely acknowledgments of the state of the art, and not an enlargement of the invention described in the patent, and did "not describe them as included in the applicant's invention." Id. Likewise, in this case, Chan's statement in the Background of the Invention section that internal caches existed in the prior art was merely an acknowledgment of the state of the art and does not describe internal caches as being part of the Chan invention. The Chan cache memory
14

See Phillips, 415 F.3d at 1321 ("We have made clear, moreover, that the ordinary and customary meaning of a claim term is the meaning that the term would have to a person of ordinary skill in the art in question at the time of the invention, i.e., as of the effective filing date of the patent application.").

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chip and cache controller chip are the only items that are described and enabled in the patent specification. There is no discussion in the specification or anywhere else in the intrinsic evidence of how to implement an internal cache or any drawings depicting an internal cache.15 H. CHAN CLAIM CONSTRUCTIONS

ProMOS impermissibly ignores the Federal Circuit's mandate in Phillips and other precedent by: (1) construing terms out of context solely using dictionaries and other extrinsic sources and ignoring the specification and the prosecution history; (2) attempting to require the jury to construe other claim terms by arguing construction is not necessary; and (3) for the means-plus-function terms, manufacturing structure not clearly linked in the specification to allegedly perform the specified function. ProMOS's improper approach should be rejected. 1.
Freescale
a memory chip that is external to the CPU chip

"cache memory apparatus" / "cache memory" - `709 claims 1, 13, 17, 22 and `241 claims 1, 15, 16
ProMOS
"cache memory apparatus" does not need construction. "cache memory" = a small block of high speed memory associated with a computer processor/microprocessor (CPU)

Freescale agrees with ProMOS that a cache memory can be a small block of high speed memory, and that once "cache memory" has been construed, the meaning of "cache memory apparatus" will be clear. (See ProMOS's Opening Br., DI 84 at 25). ProMOS's proposal does not go far enough, however, because it (intentionally) avoids what Chan actually invented and disclosed, which is a cache memory chip. The principal dispute here is whether the "cache memory apparatus" and "cache memory" must be external to the CPU chip (Freescale's
15

In addition to running afoul of the "enablement" requirement in § 112 ¶ 1, allowing the `709 and `241 patents to cover an internal cache would violate the "written description" requirement. See Vas-Cath, Inc. v. Mahurkar, 935 F.2d 1555, 1563 (Fed. Cir. 1991); Reiffin v. Microsoft Corp., 214 F.3d 1342, 1345 (Fed. Cir. 2000) ("The purpose of this provision is to ensure that the scope of the right to exclude, as set forth in the claims, does not overreach the scope of the inventor's contribution to the field of art as described in the patent specification."); Gentry Gallery, Inc. v. Berkline Corp., 134 F.3d 1473 (Fed. Cir. 1998).

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proposal) or can also be construed to cover caches that are internal to the processor (ProMOS's proposal).16 As demonstrated in Freescale's opening brief and above, Freescale's construction is correct because the only device that Chan described and enabled in his patents is an external cache, the object of the Chan patents can only be accomplished by an external cache, and the alleged advantages of the Chan patents can only be achieved with an external cache.17 ProMOS's construction, once again, seeks to cover subject matter Chan clearly did not invent and, therefore and not surprisingly, lacks support in the intrinsic evidence. As discussed above in Part I.G, ProMOS's only alleged record support comes from the "Background of the Invention" section and, even this background discussion does not support ProMOS's construction.18 Moreover, the extrinsic evidence on which ProMOS relies, a 2004 publication, actually supports Freescale's, and not ProMOS's, construction.19 That publication instructs, on a page that ProMOS failed to cite, that the performance of a CPU with an internal cache can be improved by adding an external cache device ­ "[e]ven greater performance can be achieved by building an off-chip cache of faster memory outside the processor . . . to accelerate the access time of SDRAM during on-chip misses"20 ­ in other words, exactly what Chan did. As

discussed above in Part I.E. accelerating the access time of the SDRAM system memory during on-chip misses (i.e., when the internal cache, if there is one, does not contain the data sought by the microprocessor) is the problem identified and solved by Chan's invention. And, as Chan
16 17 18 19

20

Freescale also believes the "associated with" language is vague and will confuse the jury. See supra Part I.A-G and Freescale's Opening Br., D.I. 85 at Part III; IV.A. See ProMOS's Opening Br. at 6, 11 (citing 2:60-65 and 2:66-3:1.) Many of the extrinsic sources on which ProMOS relies are from the wrong time frame, which, in the case of Chan, is June 1990. See, e.g., PC Connector Solutions LLC v. SmartDisk Corp., 406 F.3d 1359, 1363 (Fed. Cir. 2005) (noting that the meaning of claim "must be interpreted as of [the] effective filing date" of the patent application). See Ex. 6 to ProMOS's Opening Br., P. Genua, A Cache Primer (Oct. 2004) at 6.

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recognized and confirmed by the 2004 publication, using an external (not internal) cache to accelerate the operations and decouple the microprocessor from the system memory is the solution to Chan's problem.21 2. "cache controller" / "controller" - `241 claims 1, 15 and 16
Freescale
a chip that controls a cache memory chip

ProMOS
circuitry that controls the transfer of data or other information to and from cache memory

ProMOS's construction for these terms is overbroad and, significantly, again ignores that what Chan described and enabled as his invention was a cache controller chip that was separate from the microprocessor chip. First, ProMOS's construction is so broad that it can actually cover a microprocessor.22 This is a nonsensical result because the claimed "controller" is designed to work with ­ and not be ­ a microprocessor; indeed, the point of a cache controller is to control the transfer of information between a cache and a microprocessor. (`709 at 6:55-60.) Moreover, ProMOS's construction ignores the fact that every embodiment, every description, and every figure of the cache controller in the Chan specification is of a cache controller chip that is separate and external from the microprocessor chip and the cache memory chip. (See e.g., Figs. 13, 14, 32 and 33 and DI 85 at 33-34.) Patent Figures 14 and 32, for example, identify the specific cache controller chip as the MS441 (shorthand for the MOSEL MS82C441).
21

The Chan specification specifically acknowledges that the claimed cache

22

Under Federal Circuit caselaw, ProMOS cannot construe these terms beyond Chan's actual invention to allow it to argue infringement where none exists. SciMed Life Sys., Inc. v. Advanced Cardiovascular Sys., Inc., 242 F.3d 1337, 1341 (Fed. Cir. 2001); Netword, LLC v. Centraal Corp., 242 F.3d 1347, 1352 (Fed. Cir. 2001) ("Although the specification need not present every embodiment or permutation of the invention and the claims are not limited to the preferred embodiment of the invention, neither do the claims enlarge what is patented beyond what the inventor has described as the invention."). Moreover, ProMOS did not provide support for its use of "circuitry" in its construction. The intrinsic evidence on which ProMOS relies merely supports the unremarkable proposition that the controller performs a "control function", a proposition with which Freescale agrees.

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controller is an external chip by identifying its terminal pins; the cache controller obviously would not need pins to communicate with the microprocessor if it were internal to the microprocessor.23 Because Chan throughout the specification described the cache controller as being a chip separate from the processor and the cache memory chip, Chan has defined his cache controller as being an external chip.24 Freescale's proposed construction should be adopted. 3. "system memory" - `241 claims 1, 15 and 16
Freescale
main memory of a computer system that is external to the CPU chip

ProMOS
Main memory of a computer, relatively larger and slower than cache memory

Once again, the principal debate here is whether the main memory, like the cache memory and cache controller, are external to the host processor (Freescale's proposal) or can be internal to the host processor (ProMOS's proposal). Again, however, every embodiment, every description, and the only figure showing system memory in the Chan specification is of system memory that is external to the microprocessor chip and the cache memory chip ­ there simply is

23

24

See, e.g., `709 at 5:47-48 ("FIG. 33 is a diagram showing functional block pin groups of cache controller 70."); `709 at 10:47-52 ("The burst RAM cache memory 72 and controller 70, in accordance with the invention, control the paths of data in response to various control signals. These signals, along with the terminal pins of cache memory 72 and controller 70 from which they are provided, are listed below in Tables I and II."); `709 at 50:46-49 ("The controller 70 presents a very 486 CPU-like interface to system logic. The great majority of system interface pins have the same name and functionality as their 486 CPU counterparts."); `709 at 50:61-63 ("On the system side, the controller 70 has an identical list of pins as does the i486 CPU, except for the following pins . . .") (emphases all added). See, e.g., Bell Atl., 262 F.3d at 1271 ("when a patentee uses a claim term throughout the entire patent specification, in a manner consistent with only a single meaning, he has defined the term by implication" (internal quotations omitted)); see also Innovad Inc. v. Microsoft Corp, 260 F.3d 1326, 1332 (Fed. Cir. 2001) (construing the term "dialer" as having no keypad, where "[r]epeatedly, the specification emphasizes that `the dialer has no keypad.'"); Laitram Corp. v. Morehowe Indus., Inc., 143 F.3d 1456, 1463 (Fed. Cir. 1998) (finding "driving surface" limited to flat driving surfaces because "nothing in the written description suggested that the driving surfaces can be anything but flat" and "the benefits of having flat driving surfaces are stated in the `Summary of the Invention' portion of the written description").

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no support to the contrary anywhere in the intrinsic evidence. (See, e.g., Fig. 32l DI 85 at 2532.) As discussed above in Part I.F, a person of ordinary skill in the art would view system memory as being separate from the microprocessor chip. Freescale's construction for this term should be adopted. 4. "host processor" / "host" / "host microprocessor" - `241 claims 1, 10, 15, 16
Freescale
a single chip central processing unit (CPU)

ProMOS
CPU associated with one or more cache memories

ProMOS has mischaracterized Freescale's position. As discussed in Freescale's Opening Brief, Chan uses these terms interchangeably in the specification to describe a microprocessor. (DI 85 at 45.) Thus, Freescale's construction is that these terms should be equated with a microprocessor, which is a single-chip central processing unit ("CPU"). ProMOS has proposed a construction that, once again, has no support in the specification or anywhere else in the intrinsic evidence to impermissibly stretch the claimed cache memory and cache memory apparatus into being internal to the microprocessor. discussed above, ProMOS's position should be rejected. II. TERMS IN WHICH PROMOS'S GOAL IS TO PRESERVE AN ABILITY TO TWIST ITS CLAIM CONSTRUCTIONS AT TRIAL When offering constructions, ProMOS at times avoids the specification completely and instead simply (and improperly) construes claims terms in the abstract. For example, as For the reasons

demonstrated in Freescale's Opening Brief, the Chan specification uses the term "buffering" in a specific way to give that term a special meaning. (DI 85 at 45.) ProMOS conveniently and impermissibly simply ignores this intrinsic evidence, and instead applies a dictionary definition to this term. This approach to claim construction was expressly rejected by the Federal Circuit, and should be rejected in this case also. "The main problem with elevating the dictionary to such prominence is that it focuses the inquiry on the abstract meaning of words rather than on the - 25 -

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meaning of claim terms within the context of the patent.

Properly viewed, the "ordinary

meaning" of a claim term is its meaning to the ordinary artisan after reading the entire patent. Phillips, 415 F.3d at 1321. To dodge fatal indefiniteness issues and preserve an ability to twist claim constructions at trial, ProMOS at other times simply argues that certain other key claim terms need not be construed at all. For example, ProMOS candidly admits that the claim term "operably

decoupled" does not have a readily understood meaning (DI 84 at 22), yet ProMOS argues that the Court nevertheless should not construe it and does not even bother to try to offer a construction for this meaningless term. Controlling precedent, however, dictates that the Court should construe contested claim terms because otherwise the jury will concededly be left to guess what the term means, without regard to the canons of claim construction, and meaningful appellate review will be frustrated. "[T]he trial court in a patent case must at minimum take steps to assure that the jury understands that it is not free to consider its own meanings for disputed claim terms . . . ." Sulzer Textil A.G. v. Picanol N.V., 358 F.3d 1356, 1366 (Fed. Cir. 2004); see also Graco, Inc. v. Binks Mfg., 60 F.3d 785, 791 (Fed. Cir. 1995). In Toro Co. v. Deere & Co., the Federal Circuit remanded claim construction where the trial court had stated that the claim terms received their "ordinary meaning", but failed to articulate that meaning. 355 F.3d 1313, 1319 (Fed. Cir. 2004). Moreover, that term must be construed not as a layperson may generally understand that term in a different context, but instead as it would be understood by a person of ordinary skill in the art at the time the alleged invention was made, and in the context of the entire patent. Phillips, 415 F.3d at 1313. Such meaning is a legal matter which this "court has the power and obligation to" decide. Markman v.

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Westview Instruments, Inc., 52 F.3d 967, 979 (Fed. Cir. 1995). A. Port Terms ­ Doorway To The Chips

Because it is the only way it can strain these terms into an infringement argument, ProMOS' constructions of these "port" terms impermissibly avoid the full context of specification. Instead, ProMOS takes isolated snippets from the specification out of context to support erroneous constructions for the "port" terms. Instead of looking first at the Chan specification and other intrinsic evidence, as mandated by the Federal Circuit, ProMOS instead scoured through dictionaries to find a definition for port that it liked. Compounding this error, ProMOS then erroneously equated "port" with