Free Redacted Document - District Court of Delaware - Delaware

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United States Patent
Balakirshnan et at.
OFF-LINE CONVEKl'ER WITH INTEGRATED SOFISTART AND FREQUENCY JITTER
Inventors: Baln Balaldrshnan; Alex Djengwrlan, both of Saratoga; Leif Lund, San Jose, all of CA (US)

(10) patent NO.:
(45)

US 6,229,366 B1
May 8,2001

Date of Patent:

(54)

OTHER PUBLICATIONS

(75)

(73) Assignee: Power Integrations, Inc. Sunnyvale, CA (US)
( * ) Notice:

Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.

(21) (22)

Appl. No.: 09/573,081
Fded:

May 16,2000 Related US. Application Data

(62)

Division of application No. 09/080,774. tiled on May 18, 1998, now Pat. No. 6,107fil.

H S . Hoffman, Jr.. "Self-Gencrated Bias Supply". IBM Technical Discluscr Bulktio, vol. 20, No. 5, Oct. 1997, pp. 1814-4. H.S. Hoffman, Jr. et al, "Proportiom1 Drive Supply with Divesion Control". 1BM Techinical Disclosure Bulletin, vol. 21. No. 12, May 1979, pp. 4904-4905. A. Halpcrin. 'Primary Regulated Dual Power Supply", IBM Techinical Diilosure Bulletin, vol. 21, No. 10, Mar. 197901 pp. 4299-4UX). "5-W &-dc converlers aim at telecomm applications", Eketronic Design vol. 31, No. 15, Jul. 21, 1983 pp 227. "Combined Switch-Mode Power Amplifier and Supply", IBM Technical Disclosure Bulletin, vol. 28. No. 3, Aug. 1985, pp. 1193-1195. R. Bmckoer, et al., tim mi zing Converter Dcsign rod Performaoa Utilizing Micm Controller System Feedback Control", b e d i n g s of Powercoo 8, E-2.1981, pp 1-10. B. Pelly et d ,OPowcr MOSFETs take tbc load off switch. ing supply design. Ekctronic Design, Feb. 1983, pp 135-139. (List continued on next page.)
Primary E x m i w 4 e f f r e y Zweizig (74) A n o r ~ yAgent, or F i r 4 1 a k e l y Sokoloff Taylor & ,

(52) (58)

US. CI.

........................ 327/172, 3271143; 3271531;
3271544 3271142, 143, in, 174,175,176,530,531, 544

Zafmau, LLP (57) ABSTRACT

Field of Search 3271172.

(56)

Refemnces Cited U.S. PtUTNT DOCUMENTS

(List continued on next page.)

FOREIGN P m N T DOCUMENTS
0 651 440 A1

0 694 966 A1 0 736 957 A1

10f1996 (EP) .

5 1 1 W (EF') . In996 (EP) .

A pulsc width modulated switch comprises a first terminal, a sccood terminal, and a switch that allows a signal b be transmitted between the firs( terminal and the second terminal according to a drive signal provided at a control input. Tbe puke widtb modulated switch also comprises a frequency variation circuit that provides a frequency variation signal and an oscillator that provides an oscillatmn signal having a bequency of that varies within a frequency range according to the frequency variation signal. The oscillator further provides a maximum duty cycle signal comprising a first state and a second state. The pulse width modulated switch further comprise. a drive circuit that provides Ibe drive signal when the maximum duty cycle signal is in tho fist slate and a magnitude of the oscillation signal is below a variabk threshold kvel.
18 Claims, 9 Drawing Sheets

(List coutioucd on next page.)

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U.S. PATENT DOCUMENTS
3.916,ZZ 4 4 077.965 , 4,143. 282 4,228. 493 4,236, 198 4,4952 54 4,559, 590 4,622, 627 4,695, 936 4,706, 176 4,706, 177 4,tE0, 641 4,725, 769 4,734, 839 4.739, 462 4,806, 844 4.809.148 4$11;184 48 4 674 .1. 4.858, 094 4.862,3 39 4.8662 90 4.8703 55 4,887, 199 478 497 . 3, 6 4,890, 210 4928, Po 4.937. 728 4 943907 . 50 2 401 .1, 5,014, 178 5.021. 937 5.004, 871 5.(#1. 956 5.07235 3 5.086364 5,1463 4 5.161. 098 5 ln,a , 5.200. 886 lOf1975 a1978 311979 10fl98) 1111980 111985 1211985 1111986 911987 11l1987 110987 111988 211988 311988 40988 211989 2/1989 311989 311989 8fl989 80989 911989 911989 1211989 12/1989 12/1989 511990 60990 70990 411991 50991 6D991 7fl991 En991 12/1991 u199.2 911992 1111992 111993 411993
307f264 ....... Kondo ....... 354/51 Berard, JI. el al.. 307143 dc S m c el al 363156 Ohrawa et a1.......... 363149 S i i d al 363121 Davidson ............................... 363121 Rodriguez el al 363137 ............... Whinle ................ 363121 KeUschau 363121 Joxphron 363R4 Faini ............................. 307118 .. C n c8 a1.. ii 323/283 Badbold ............................... 363116 Fmsworth e al l 363R1 Claydon d a1.. 323/311 . Barn . 363/20 Koninsky el a1. .-.-... ....... 363ll7 IIrauky ............................... 3181254 Bailage 36301 loou ct d . ...-.-.-.-.-.......... 363R1 O b k a d al. ........................ 363149 White 363R1 Wbillle 363149 DaUabora e l al. Unm23 Mcyers 363I21 While 363/% Leonardi 363197 Cardwell, Jr. 33/97 Barladg 363/97 Bslalrrishnan 363149 Cobea -.363141 Olumolo el PI. 36W5 Marinla 363121 FcMlreller .-363120 Leipold el aL 361118 lshii ct al. 363116 BakMbnan 363/144 M~I~UW ........................... 31sm1 Scbwul cl al....................... 363149

Daniels et al.

. .....,...-...

. ...-..-.--

........ ...................

5.245.5 26 5,297, 014 5,3133 1 5394, 017 5,452, 195 5,461,303 5.481, 178

S W ,602
5,528, 131 5,552, 746 5,563,534 5,568,084 5,570, 057 5,572, 156 5,617, 016 5,619, 403 5,621.6 29 5,640,3 17

--

............................ ...-.............
..................

911993 311994 511994 V1995 911995 1011995 111996 411996 6119% 9119% 1Wl996 1W996 1011996 1111996 411997 411997 411997 611997

Balaksishnaa cl a1. 363197 Sailo el a1 363f21 EblaLrirbnno ...-.--.......-.- 3631147

.

Cahoo el al.......................... 307166

Lebr et a1.............................. 363/21 Lcman el al. 3231222 Wdcox et at. .....-..............- 323R.87
323RZ2 323t901 3271427 37 2m 323/538 321/369 D i d et a1. 3271109 Borghi el al 323/2&1 Ishikawa d al. ..............-..-..363/21 Htmmingu d al................... 3631% Lei 36349

Borgato el al. ..............-.... Ma* et a1. Daostrom Rossi d al Mcaure et d. F'alan ..........................

.

.

FOREIGN PATENT DOCUMENTS
0 740 491 A1 0 748 034 A1 0 748 035 A1 0 751 621 A1 WO 83/01157 1011996 (EP) 1211996 (EP) 1U1996 (EP). 111997 (EP) . 311983 (WO) .

..............................

. .

...............................

-- ..-.-.................................. ......................
..........................

OTHER PUBUCNIONS D. Azzis el aI, "Flyback on Card Power Sypply". 1BM Technical Disclosure Bulletin, vol .23. No 4. Sep.1980. pp
1477-1478 .

.

.

-

-

. . . . Power . Technique Single Tramformer Feed Back Three Contmt Signals". IBM Technical Disclosure Bulletin. vol . No. Jan 1990.
A . Bowen el al., "Power Supply with Optical Isohtor" J
1972 pp 3320 "Off-Lioc Supply Conlrol

IBM Technical Disclosure Bulktin vol . 14 No. 11 A p r.
Using a
lo

.

32,

-

pp. 272-273 .

8 4

.

cited by examiner

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O W - r n CONVERTER WITH INTEGRATED SOFISTART AND P'Rl3QUENCY IITTER

2
components that are utilized as part of the EM1 filter. The cost of the EM1 filter is in large part determined by the size of the inductor and capacitor utilized. The longer the components, the higher the cost of the power supply. s Further, simply utilizmg an EM1 filter does not address the radiated EMI. ADOther problem with pulse modulated from operation of power supply at 'Iart up. At start up. the voltage, current and power at the output lo of the power supply will essentially be zem. The pulse width modulated switch will then conduct for the maximum possible amount of time in each cycle of operation. The rcsult h i of ts is a maximum inmsb current into the power supply. 'Ibe maximum inrush current is greater than thc current that 3s is utilized during normal operation of the power supply. The maximum inrush current streses the components of power SUPP~Yand switch. Stress is specifically a ~roblem the for ~ w i k b * tramistor. the lnnsformer of the p o w 1 supply, or and thcsccondar~ side c o m ~ e n t s O f power supply. The Ihe caused by maximum inrush current Ihe u, Overalllife Of Ibe powrsupply and Ibe Ihe rating of the POwr wed in power not from the in* a~rrents will be greater than maximum rating 'peration. 25 Wuired for Furcher, when the pulse width modulated switch conduas for the maximum possibk amount of time in each cycle of operation the voltage, current and power at the output of tbe POwer supply rise rapidly. Since Lhe fecdback circuit of the POwtr OHen as fas(stbe operatit% ke4uenc~ the switch, the npid rise of the voltage, current of and power will often result in an overshoot of the maximum voltage in the regulation range which will cause damage lo 35 the device being supplied power by the P w e r supply. Referring to FIG. 1a lcwwo power supply tbat attempts to minimize EM1 and redua startup stress is depicted. A rectifier 10 rectifies the filtered AC maim voltage 5, from EM1 filter 120, input by the AC mains to gencrak a rectified voltage 15. Power supply capacitor 21) then generates a substantiany DC vollage with a ripple component. The rectified vollage 1s with ripple compoocnt is provided to the primary winding 35 of transformer 40 that isuscd to provide power to secondary winding 45. The output of scwodary 45 winding 45 is provided to secondary rcclifier 50 and a c ondary capacitor 55 that provide a secondary DC voltage MI at tbe power supply output 65 to the device tbat is coupled to the power supply. In order to maintain tbc secoodary DC voltage within a regulate range a feedback loop including an optocoupler 70. Zener diode 75 and a feedback rcsistor 80 pmvidcs a signal indicative of the voltage at the power supply output 65 to feedback pin 85 of pula width modulated switch 90. Tbe voltage magnitude at the feedback terminal is utilizd to 55 vary the duty cycle of a switch coupled bctwccn the drak terminal 95 and common terminal 100 of the puke width modulattd switch 90. By varying the duty cycle of the switch the average current Bowing through the primary winding and therefore the energy stored by the transformer 60 40 which in turn controls the power supplied to the power supply output 65 is kept within the regulated range. A compcmation circuit 105 is wupkd to the feedback pin 85 order to lower the bandwihh of the frequency of operati00 of lbC puke width modulator. 65 lnrusb currents are minimized at start up by usc of soft start capacitor 110. Soft start functionality is termed to bc a funaionality that reduces the inrush current5 at start up. At

CROSS-REFERENCE RELATED TO
APPLICATION This is a Divisional of U.S. application Ser. No. 09/080, 774, filed May 18, 1998, now US. Pat. No. 6,107,851. BACKGROUND

1. Field of the Invention The tield of the present invention pertains to the field of
power supplies and among other things to the regulation of power supplies. 2. Backgmund of the Invention Power supplies that convert m AC maim voltage to DC voltage for use by inlepated elcctrooic devices, amon@ other devices are knom. The power supplies are required to maintain the output voltage. current or power within r regulated range for efficient and safe operation of the elcctrooic device. Switches that operate according a pulse width modulated control lo maintain the output voltage, current, or power of the power supply within a regulated range are also know. These switcbes utilize an oscillator and related circuitry to vary the swjtching f q u e n c y of operation of the switch, a d therefore regulated the power, current or voltage that is supplied by the power supply. Apmbkm utilizing pulse width switches is that they operate at a relatively high frequency compared to t h frequency of the AC mains voltage, which resuhs in a high ficquency signal being genented by the supply, n shigh frequency i is injected bKk into the AC mains input aod becomes a component of the AC mains signal. The high frequency signals are also radiated by the powcr supply as ekdromagnetic waves. Tbcsc high frequency signals add to the Electromagnetic Interference (EMI) of the power supply, m d in fact are the largest cwtniutors to the E M of the power supply. The EM1 generated by the power supply cao cause problems for communicatioosdevices in the vicinity of the power supply and the high frequency signal which bemmes a component of tbe AC mains signal will be provided lo other devices in the power grid wbich also causes wiu probkrns for 1bos.e devices. Further, the radiated EM1 by the power supply can interfere with radio and bkvision w-issions that arc transmitted over the air by various entities. To combat the probkm of EMI, several s p d c a t i o n s have bcco developed by the Federal CommunicationsCornmission (FCC) in the Unild States and the European Community (EC) have establihcd specification that specify the maximum amount of EM1 that can bc produced by classes of electronic devices Since power supplies generate a major component of tbe EM1 for ekdronic devices, an important step in designing a power supply is minimizing the EM1 provided by the power supply to kvels with the aoccptabk Limits of the various standards. Since, a power supply can be utililizcd in many different wuntrics of the world, the EM1 p r o d u d should be within the most stringent limits worldwide to aUow for maximum utilization of tbe power supply. A known way of minimizing the EM1 provided by 1 k power supply is by adding an EM1 filter to the input of the power supply. An EM1 filter generally utilizes at least o m inductor. capacitor and resistor in combination. However, the greater EM1 produced by the power supply the larger the

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this instant a current begins to flow through feedback transmitted between a firsl terminal and a second terminal resistor 80 and thereby into soft start capacitor l 0 k the l. acoording to a drive signal. The pulse width modulated voltage of soft start capacitor 110 increases slowly, current switch akocomprises an osciUatorthat provides a maximum duty cycle signal comprising an on-state and an off-state, a will flow through light emitting diode ll5 of optocoupler 70 ot thereby controlling the duty cycle of the switch. Once Ihc 5 drive circuit that provides the drive signal, and a s f start voltage of the soh start capacitor 1 0 reaches the reverse 1 circuit that provides a signal imtructing said drive circuit to breakdown voltage of zcner diode 75 current will Bow disable the drive signal during at least a portion of said on-state of the maximum duty cycle. through zcner diode 75. The approach desaibcd above will reduce the inrush currents into h e power ~ U P P ~ Y . however. In an ahernate embodiment the present invention comit will he, several cycles before the light emitting diode 115 10 prises a r c ~ l a t i o n circuit comprising a switch that allows a will &gin cooductiog. During the seven! c ~ c k s maxisignal to be transmitted between a first terminal and a sccond mum i n r ~ ~ h current will still flow &mu@ the primary terminal according to a drive signal, a drive circuit that winding a d other secondary side componens. During provides the drive signal and a soft start circuit that prcwides cycles the transfomer may saturate, and therefore the trama ignal instmcling tbe drive circuit to disabb tbc drive former may have to be designed utilizing a higher a r c size 15 signal. than would be nquired for ~ o r opcntim even with the d 1, yet another embodtnent the pracnt inventiw a m use of soft start capacitor as in FIG.1. prises a regulation circuit comprising a switch that allows a To rcducc the EM1 output by the power supply an EM1 signal to be transmitted between a first terminal and a sccood Eltcr 120 is utilized. Additionally, pulse width modulated terminal w r d i n g to a drive s i g n 4 a frcquency variation switch 90 is equipped with fiequemy oscillation terminals 20 circuit that provides a frcqueocy variation signal, and a drive 125 and WO. Frequency oscillation tenninal 125 and 130 circuit that provides a drive sigml for a maximum time receive ajilter current 135 that varies according 10 the ripple period of a t i w duration cycle. The time duration of tbe annponent of subslantially DC volbge 25.jitter current cyck varies according to Lbe frrquency variation signal. 135 is used to vary the firwemy of the saw-loohd In the above refcrcoced embodiments the pulse width waveform generated by the oscillator contained in the pulse 2s switch or circuit may a width modulated switch 90. The saw toothed waveform mowlithic &vice. gemrat4 by the oscillator is compared to the feedback &jen of ~ p ~of the present invention is diredd c t prnvidd the pin 85.As frquenc~ saw 1 a pulse width m&lated 0 that has integrated toothed waveform varies, so will the switchingfrequency of stdrt capabilities the switch coupkd between the drain and common terminal. This the switching of switch to be h o t h e r object of an aspect of thc present invention is the peak directed toward a pulsc width modulated switch that has spread a lvger baodwidth, which variation Warnities. intcgnted value of the EM1 generated by the power supply at each Yet aoOlher objcct of an aspect of the present invention is hquency. By reducing the EM1 the ahiliy to m p l y with becaw the goverment a directed toward a puke width modulated switch that has is integrated frequency variation capabilities and integrated specify quasi-pc& and avenge values at given frequency levels. Varying the frequency of operation of he A further object of an aspect of Ihe present invention is puke width modulated switch by varying the oscillation direcbd toward a low cost regulated power supply that has frequency of the oscillator is referred to as frequency jitter. with !be EM] rcduaion scheme 40 both soft start and hcquency variation capabilities. A problem This and other objects and aspccls of the present iwenI. described with nspccl to F G 1is that the ripplecomponent lions are taught, depicted and described in the drawings and will bave variances due to variations in Ibc lioe voltage and the d ~ r i p t i o n the invention contained herein. of output load. Additionally, since the ripple may vary, design and the component value of EM1 resistor 140 is d i i c u l ~ to BRIEF DESCRIPTION OF THE DRAWINGS determine and wmspoodingly design of tbe power supply 4s FIG. 1 is a lcnown~powersupply utilizing a pulse width becomes problematic. modulated switch, and external soft starf and frequency jitter functionality. SUMMARY OF THE INVENTION FIG. 2 is a presently preferred power ~ ~ P P utilizbg an IY one embodiment the hvention a so pulse width modulated switch according to the present width switch compririw a switch that allows a signal to be transmitted between a fintterminal and FIG. 3 i a presently preferred p u b width modulated s a -od terminal acoording to a drive signal. switch amding present invention. width modulated switch also comprises a frequency variaFIG. 4 i a timing diagram of the sofi start operation of the s tion circuit that provides a frequency variation signal a d an s5 presently preIerredpulsc width modulated switch according oscillator that provides an oscillation signal hving a fie10 fhe Present invention. quency that varies within a frequency range according to the FIG. 5 is a timing diagram of the frequency jitter operafrequency variation signal. The d l l a t o r further provides a tion of the presently preferred puke width modulated switch maximum duty cycle signal comprising a first state and a second state. The pulse width modulated circuit further M, according to the present invention. comprises a drive circuit that provides h drive signal when FIG. 6 is an alternate presently preferred pulse width the maximum duty cyck signal is in the first state and a modulated switch acwrding to the present invention. magnitude of the oscillation signal is below a variable FIG. 7 is a timing diagram of the operation of the alternate threshold level. preseotly preferred pulse width modulated switch of FIG. 6 Another embodiment of the present invention comprises 6s according to the present invention. a puke width modulated switch comprising a swhch comFIG. 8 is a presently preferred powr supply utilizing a prising a co~ltrolinput, the switch allowing a signal to be regulation circuit according to the present invention.

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FIG. 9 isa presently preferred regulation circuit according to the present invenlion.

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The drain terminal 300. source termioal3M and feedback terminal 295 are the electrical input andlor output poinls of the puke width modulated switcb 262. They need not be part DESCRIPTION OF THE PREFERRED of a monolithic devicc or integrated circuit, unless tht pulse EMBODIMENT 5 width modulated switch 262 is implemented utilizing a monolithic *vice integrated cirGitReferring to FIG. 2, EM1 filter 200 is coupled to an AC mains voltage 205. The AC mains voltage 205 is rectified by Puke width moduhtcd switch 262 also may have soft h s rectifier 210. T e rcclided voltage 215 i provided LO power start capabilities. When the dcvicc to which the power supply capacitor 220 which provides a substantially DC supply k coupled is switched on, a power up signal is voltage 225. Tbc substantiallyDCvoltage 225 is provided to lo generated within the internal circuitry of pulse width modulated switch 262. Tbe power up signal is used to trigger soft the primary winding 230 of transformer 235 which stores the energy provided to primary winding 230. When the start circuitry that reduces the duty cycle of the switch that primary winding 230 is m longer receiving eocrgy, energy operates wirhin the pulse width modulated switch 262 for a is delivered by the transformer 23510 the secondary winding predeterminedperiod of time, which is presently preferred to 240. The voltage induced across tbe secondary winding 240 15 be ten (10) milliseconds. Once soh start operation is is rectified by rectikr 245 and then transformed into scccompleted, pulse width modulated switch 262 operates ondary substantially DC voltage 265 by secondarycapacitor according to its regular duty cyck. 260 and provided to tbe power supply output 267. Alternatively, or in addition to sofi start functionality, Eocrgy k longer provided to primuywinding 230 pulse widlh mcdulakd switch 262 may also have frequency when the puke width modulated switch 262, which is 20 jitter functionality. That is, the switching frequency of the cwpled to the primary winding 230, ceases cooduction. pulvt widtb modulated switch 262 varies according lo an Puke width modulated switch 262 is a switch that is intermi fhqueocy varialion sigoal. lbis has an advantage contmlkd by a pulsc width modulated signal. Puke width over the frequency jitter operation of FIG. 1in that the frequency range of the prescn~lypreferred pulse width modulated switcb 262 conducts and aascs conduction according to a duty cycle, that k in part determined by modulated switch 262 is known and fixed, and k not subjcct feedbadc from thc power supply output 267. Pulse width to the t i e voltage or load magnitude variations. At low powers, those less than approximately ten (10) watts, the modulated switch 262 is a switch that operdes according to pulse width modulated mntrol. F~dback the puke width dc common mode choke which is oRcn utilized as part of the modulaled switch 262 is accomplished by utilization of EM1 filter 120 can be replaad witb inductors or resislors. feedback circuit 270, which is presently preferred to comcan ,+.hen comparing supply o f m ~ . prisc a mner diode 275 in series witb a resistor 280 and 1 lo &at of RG. 2 numbcr of cmpnents is ~P~=P'U 2% O P ~ ~ W U 285 provides a fedback P'~~ reduced. This redum Lbe overau cost of the power supply current 290 to feedback ternrind295 of puke width modud u c i o g i~size. lated switch 262. Thc feedback current k utilized to vary ttac Referring FIG. 31 hq*ncy variation signal 400 is dutycycle ofa switch coupled ktweenfirst teminal 300 35 the utilized by the puke. width modulated switch262 to vary its 305 md rcFlate the output switching frequency witbin a frquency range. 7ke frevoltage. current or power of the power supply. quency variation signal 400 is provided by fnqucocy variaMhough, it is p=ntly prefed tbal Output circuit 405, which p~ferably -prim an escalator is utilized for feedback, I& present invention is also capabk that at a lower frequency main oscillator 465, of utilizing either the current or Power at the Power supply ~ b , 6equency variation signal 400,is presentlypreferred to output267 witbout departing f*m fie spirit and s V ofthe be a eianguhr waveform tbat pnfenably oxillales bemeen present invention. four point ftvc (45) volts and one point five (1.5) volts. A portion of the. cunent supplied at the feedback terminal Although the presently preferred frequency variation signal 295 i utilized 10 supply bias Power for operation of s 400 is a triangular waveform, allernale frquency variation PU~X width modulated switch 262. ~maindcr the of signals such as ramp signals, counter output signals or other current input at the feedback temind 295 is utilized to signals that vary in magoim& du&g a finedperiod of time control the duty cycle of the pulse width modulated switch may b , as the frequeocy variation signal. 262, witb the duty cycle being inversely proportional lo the fIequcocyvariation sipal 400 is to soft feedback current. so start circuit 410. During operation soft start circuit 410 is A bias winding 310 k utilized to bias optocoupler 285 so provided with ,,,id& modulationfrcqueocy signal tbat a fccdback current can Bow when fight emitting diode 415 and power up GgPal420. Soh stat enabk siWd 421 315 of optocwpkr 285 conducts.'Ibc powersuppfied by the g w s high at power up d remaim high until oscillator bias w d h g 310 i also used 10 charge puke width d u s signal 400 reacbes its peak value for the first time. Sofi start lation capacitor 330. tbc e m r g ~ bom which is utilized to 55 circuit 410 will provide a signal to or-gate 425 to reset latch power the pulse width modulated switch 262. 430 thereby deactivatiog wnduction by the. switch 435, Ovcwoltage protedion circuit 335 is utilized to prevent which is pcexntly preferred to be a MOSFET. Soft start overvoltages from propagating through to the u M s f o m r circuit 410 will iosl~dswitch 435 to aase conductiw 235. when the soft start enable signal 421 is pmvided and the Pulse widtb modulated switch 262 is supplied powcr 60 magnitude of the frequency variation signal 400 k less than during start up of the power supply by cumnt flowing into the magnitude of pulse width modulation signal 415. In the first brminal 300. An embodiment of one type of other words, start up circuit 410 will allow the switch 435 to apparatus and method for designing a configuration for conduct as long as soh start enable signal is high and the providing power b pulse width modulated switch thmugh magnitude of the pulse width modulation signal 415 is fist terminal300 is disclosed in commonly owned U.S. Pat. 65 below the magnitude of frcqueocy variation signal 400 as No. 5,014,178 which is inwrporaled herein by reference in depicted in FIG. 4. In this way, the inrush current at startup its entirety. will be limited for all cycles of operation, including the first

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cycle. By limiting the inrush current during all cycles of rent 530 has a fixed magnitude, the frequency variation signal can be generated utilizing a variable magnitude starlup uperation, the maximum current through each of the components of the power supply is reduced and the maxicurrent, if a variable current is generated Lhe frcquency mum current rating of each mmponent can bc decreased. spread would not be fixed in time but would vary with the The reduction in the ratings of the components reduces the 5 magnitude of currenl530. The fixed magnitude current 530 is fed into first transistor 535, mirrored by second transistor cmt of the power supply. Soh start signal 440 will no longer 540 and fed into rbird transistor 545. The hquency variabe provided by the frequency variation circuit 405 wbeo the tion signal 400 is generated by the charging rod discharging frequency variation s i g d 400 reaches its peak magnitude. of frcquency variation circuit capacitor 550. Frequency Operation of soh strrt circuit 410 will now be explained. Soh stad circuit 410 mmpriscs a soft start latch 450 that at lo variatiw circuit capacitor 550 is presently preferred to have its set input receives the power up signal 420 and ils reset a relatively low capacitance, which allows for integration input receives the soft start signal 440. Soft start enable into a monolithic chip in one embodiment of thc puke width signal 421 is pmvided to one input of softstart and-gate 455 modulated switch 262. The frequency variation sigoal400 is wbie the other input of soft start and-gate 455 is provided provided t upper limit comparator 555 and lower limit o with an output from softsbrt comparator 460. The output of comparator 560. The output of upper limit compvalor 555 soft start comparator 460 will be high when the magnitude will be high when the magnitude of the fnquency variation S i p 1 400 exceeds the upper threshold voltage 552 which is of frcquency variation signal 400 is less than the magnihlde pnscntly preferred lo be four point Eve (45) volts. The of pulse width modulation oscillation signal 415. iutput of lower limit comparator 560 will b; high when the & modulated switch 26tdcpicted in FIG. 3 also bas frequency iitter functionality to belv reduce tbc EM1 m m ~ g ~ i t ofkfrequeocY v a r ~ t i o o i ~~ l e x a bwer~ u s e -. lhrcsholdvoltagc 557 which is presently preferred to be one geoented by the-bwer suppIy lndpulsc && modulated p~id five (15) volts output of upper limit switch 262. Operation of tbe frqueocy jitter functionality "mpa"tor555 is provided t the frequency variation circuit o wN w w be explained. Main oscillamr 465 h a a current inverter 565 the output of which is provided 80 the r e s t source 470 that is m - d by mil~or current source 475. hpuf of freq~ency variation circuit latch 570. Tkc set input Main -illator drive current 615 is provi&d 10 the currcnl of frequency variation circuit latch 570 receives the output source input 485 of p m 480. of lower limit comparator 560. In opentiw, the output of be input inlo current input 485 of PWM lower limit comparator 560 will be maintained high for the cscillator 480 determines the frequency of the pulse width modulation signd 415 k by majolify of each cycle of frequency variation signal 400 PWM oscillator 480. In order to vary Lhe fiequeocy of pulse M because the magitude of frequency variation signal will be maintained between upper threshold 552.4.5 volts, and Ihe width modulation oscillation 415, an additiollll curlower threshold 557, 15 volts. The output of upper h i t rent source 495 is providcd within main oscillator 465. The ~0mpa"for555will be low until lhe magnitude of fnqucncy w e n t s o u a 495 is minored by additional upper kvel thrrsbold 552. 'his cumnt mirror 500. ~h~ cumnt provided by aa- variation signal 400ex-& tional current source 495 is varied u follows. Frequency 3s u~eanslhat reset input will reaive a high signal until the the maetu* of the frcquenc~ variation sikPal400 above variation signal 400 is provided to the gate of main oscillator the upper threshold signal 552. tramistor 505. As the magnitude of fnqueocy variation Tbe charge signd 575 output by frequency variation signal 400 increases so docs lhe voltage at the source of circuit latch 570 will be high until the frequency variation main oscillator transislor 505, due to the inacviog voltage at UIC gate of main oscillation transistor and the relatively 40 signal 400 exceeds the uppcr threshold limit signal 552. When charge signal 575 is high, transistors 585 and 595 constant voltage drop between the gate and source of the are turned off. By turning off tramiston585 and 595 current main ascillation tranrirtor 505. As the voltage at the source can flow hlo frequency variation circuit capacitor 550, of main oscillation tramistor 505 i n c w s so does the which steadily charges frequency variation circuit capacitor cunent Rowing through h e main oscillation resistor 510. 550 and increases the magnitude of frequency variation Thc current Bowing through main oscillation resistor 510 is signal 400. The current that Rows into frequency variation h e same as h e current Bowing through additional current circuit capacitor 550 is derived fmm current source 525 source 495 which is mirrored by additional current so because the current through transistor 590 is minored from mirror 500. Since. the presently preferred frequency v h a transislor 580, which is mirrored from transistor 535. tion signal 400 is a triangular waveform having a fixed period, the magnitude of the current input by additional so During power up, wben power-up signal 420 is low, the current source mirror 500 will vary linearly with the magoutput of inverter 605 is high which tunn on transistor 600 nitude of the rising and falling edges of tbc frequency causing frequency variation signal 400 to go low. The variation signal 400. If tbe frcquency variation sigoal400 is frequency variation signal 400 is presently preferred to start a ramp signal, tbe frequency would linearly rise to a peak from itslowest level to perform tbe soft start fundion during and then immediately fall to is lowest value. In &is way, the 5s its first cycle of operation. current provided 10 current source input 485 of PWhf Steady-slate operation of Lbe pulx width modulated oscillator 480 is varied in a known fixed raoge that allows switch 262, i.e. non start up operation, will now be for and accurate frequency spread of the high frequency descnid. PWM oscillator 480 provides pub width moducurrent gewrated by the pub width modulated switch. lation oscillation signal 415 to pulse width modulation F d e r , the variance of the frcquem~ dekrmincd by the 60 comparabr 609, the output of which will bc high when the is magnitude of the current provided by additional current magnitude of pulse width modulation signd 415 is greater source mirror 500, which is in turn a funclion of the than the magnitude of a f e d a c k signal 296 which is a hrnction of the input provided at feedback terminal 295. resistance of main oscillation resistor 510. Frequency varialioo circuit 405 includes a current source R%eo the output of pulse width modulation comparator 609 525 that produces a fixed a magoitude current 530 that 65 is high or-gate 425 i triggered to go high, which io turn s determines the magnitude of the frequency of tbc frequency resets pulse width modulation latch 430, removing the ~1 varialion signal 400.Although, the presently preferred cursignal from the control input switch 435, thereby turning off

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switch 435. Pulse width modulation latch 430 is set by clock signal MU, which is povided at the beginning of each cycle of p u b width modulation oscillator 480. Drive circuit 615, which is presently preferred to bc an aod-gate, receives the 3, output of pulse width modulation latch 4 0 power up signal 420. and maximum duty cycle signal 607. As long each s one of the signals is high, drive signal 610 i provided to the gate of MOSFET 435, whicb is ~ u p between first u ierminal 300 and scwnd terminal305 of the pulse width modulated switch 262. When any of the output of P U width modulation latch 430, power up signal 4m, or maximum duty cycle signal 607 goes low drive signal 610 k no longer provided and switch 435 ceases conduction. Referring to FIG. 4, frequency variltion signal 400 preferably has a period, which is greater than that of p u b width modulated oxillation sigaal 415. Ibe prescnlly preferred period for frequency variation signal 400 is twenty (20) milliseconds, in order to allow for a smooth start up period wbich is suiliciently longer than the period of pulse width modulated signal 415 wbich is presently preferred to be ten (10) microseconds Drive signal 610 will be provided only when the magnitude of pulse width modnlatcd signal 415 i s kss than the magnitude of frequency variation signal 400. Fullher, frequency variation signal 400 will be preferably initiated starting born low voltage when power up signal 420 k provided. Referring to F G 5, frequency variation signal 400 which I. is prsently preferred to have a constant period is provided to the main oscillator 465. Tbe magnitude of the p u b width modulator current 615 wiU approldmalcly be the magnitude of frequency variation signal 400 divided by the mistancc of resistor 510plus the magnitude ofthe cunent produced by current s o u r a 470. In this way the puke width modulator cumnt 615 will vary with the magnitude of the frquency variation signal 400. Ibc result is tbat the frequency of p u k width modulation signal is vzried according to the magoitude of this curmnt. It is presently preferred tbat the puke width modulator current s o u r a produces a corntan1 current having a magnitude of twelve point one (12.1) microamperes, and tbat frequency variatioo signal induced current 627 varies between zcro (0) and eight hundred (800) nanoamperes. Thereby spreading the fwq~eocy operation of of the pulse width modulation oscillator 480 and reducing the average magnitude and the quasi-peak magnitude at all frequency levels of the EM1 generated by the power supply. Refening to FIG. 6, an alternale presently preferred pulse width modulated switch 262 inchdw a11 of the same compoocnts as described with respect to PIG. 3. In addition to tbcsc compomnfs, a second fiquency variation circuit current source 660 and transislor 655 are added to chc frequency variation circuit 405. Transistor 655 is activated ot only when the output of s f start latch 450 goes low. When lrarnistor 655 is activated tbe current provided to the frequency variation circuit485 increases as does the frequency of frequency variation signal 4 0 However, tramistor 655 0. will only be turned on whcn the output of soft start latch 450 goes low, i.e. when the magnitude of frequency variation signal 400 first reaches the upper thresbold after power up. The period of frequency variation signal 400 will then increase after its first half cycle. This will decreases the period of the cycle during which IK I frequency is spread, without decreasing the frequency range. The benefit of the decreased cycle period will further decrease the quasi-peak levels of the EM1 due to spending less time at each frequency level. Referring to FIG. 7, operation of the frequency variation circuit 405 of FIG. 6 is depicted. Frequency variation signal

10
405 will preferably have a period of ten (10) milliseconds for its fist half cycle. After thai, when the transistor 655 is turned on the period is preferably decreased to five (5) milliuwnds. Pulse width modulated switch 262 is presently 5 preferred to be a monolithic devim. Referring to FIG. 8, a power supply comprises a bridge rectiiier n 0 that r e a l e s an input AC maim voltage. Power supply capacitors 720 charge with the rectified AC mains voltage to maintain an input DC voltage 725. A presently ~ preferred range for input DC voltage 725 is approximately on, hundred (100) to four hundred (400) volts to allow for operation h d upon worldwide AC maim voltages which range between eighty live (85) and two hundred sixty five (265) volts. Thc presently preferred power supply a h ,5 includes harmonic filter compoocnts 910 whicb in combination with capacitors 720 reduce Ihc harmonic cumnt injected back into the power grid. Tramfomer 730 includes a primary winding 740 magnetically coupled to secondary winding 750. The s-ary wioding 750 is coupled t a o d i i 760 that is designed to prevent current flow in tbc scc~ndary winding 750 when the regulation circuit 850 is conducting (on-state). A capacitor 770 is coupled to the diode 760 in order to maintain a cootinuous voltage on a load 780 which has a feedback circuit coupled t it. A o presently preferred feedback circuit comprises an optoooupler 800 and zener diode 820. Tbc output of optocoupler 800 is wupled to the feedback terminal825 of regulation circuit 850. lhc prcscnUy preferred regulation circuit 850 switches on and off at a duty cycle tbat is comtant at a given ioput DC voltage 740. A regulation circuit power supply bypass capacitor 860 is coupled to and supplies power lo regulation circuit 850 when the regulation circuit 850 is in the on-state. Opentioo oE the power supply w U now be descnid An i AC mains voltage is input through EM1 filter 700 into bridge 35 rectifier 710 which provides a rectified signal to power supply capacitors 720 that provide input DC voltage 725 to primary winding 740. Regulation circuit 850, which preferably operates at a constant frequency and about constant duly cycle at a given input DC voltage 725, allows cumnt 4cl to flow through primary winding 740 during its on state of each switching cycle and acts as open circuit in its off state. When current flows t h g h primary winding 740 transformer 730 is storing energy, when no curreot is flowing through primary winding 740 any energy stored in trans45 former 730 is delivered to secondary w i d i g 750. Secondary windig 750 lhen pmvides the energy to capacitor 770. Capacitor 770 delivers power to the load 780. Tbc voltage across Lbc load 780 will vary depending on the amount of energy stored in the tramformer 730 in each switching cycle so which is in turn dependent on the length of lime current is flowing through primary winding 740 in each switching cycle whicb is pnscntly preferred lo be comtant at a given input DC voltage 725. Tbe pnscntly preferred regulation circuit 850 allows tbc voltage delivered to the load to be 55 maintained at a codant level. It is presently preferred that the sum of the voltage drop across optoooupler 800 and the reverse break down voltage of zener diode 820 is approximately equal to the desired thresbold kvel. When the voltage across be load 780 so reaches the t h d l d kvel, current begins to flow through the optoooupler 800 and zener diode 820 that in turn is used to disable the regulation circuit 850. Whenever regulation circuit 850 is in t h off-state the regulation circuit power supply bypass capacitor 860 is charged to the operating 65 supply voltage, which isprcscntly preferred to be five point seven (5.7) volts by allowing a small current to flow from bypass terminal 865 lo the regulation circuit power supply

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The regulation circuit of FIG. 9 can be mcdi6ed to include bypass capacitor 860. Regulation circuit power supply bypass capacitor 860 is used to supply power to operate a second current source to further increase the period of regulation circuit 850 when it is in the on-state. main oscillation signal 415 which achieves the same result When the regulation circuit 850 is disabled, an open and function as described with respect of FIGS.6 and 7. circuit condition is created in primary winding 740 and s nesoft start functionality of presntly preferred tramformer T3@does not energy. The energy in ngu]alioo circuit 850 of FIG. 9, will the on-timc of the transformer 730 from the last cycle of regulation circuil 850 is delivered lo wiadmg 759 in switch 435 to 1 than tbe timc of thc maximum duty cycle signal 6 ' as long as the soft start enabk signal 421 is % turn supplies power to losd 780. the remaining pmvided md m ~ i t u d e h u c n c y variation signal eoergy in tramformer 750 is delivered to the load 780 [be 400 is 1 magoitude o f m a i n d 1 a t i o n signal415. voltap at voltage of the load 780 will heas. when The presently preferred regulation circuit 850 preferably the load 780 decreases below the thrabold kvel, current comprises a monolithic device. ceases to flow through optocoupler 800 and regulation circuit 850 rcruma operation either instantaneously or W I e the e,mbod-n&, appBcatiom a d advantages of nurly instantaoeously. the present invention have been depicted and described, Tbe prescntly preferred regulation circuit850 has a mthere are many more embodiments, applications and advanrent limit feature. The current limit turns off the regulation tages possibk witbout deviating from the spirit of the circuit 850, when the cumnt Bowing through the regulation inventive concepls described herein. Thur, tbc inventions circuit 850 rises above a current thrcsbold level. In this way arc not to be r s r c e to tbe preferred embodimenls, etitd regulation circuit 850 can react quickly t changes such as 20 specifiation or drawings Tbc protection to bc afforded this o AC ripple that occur in the rectified AC maim voltage, and patent should tberefore only be reshicted in accordance with pnvents Ibe propagation of the voltage changes lo the bad. the spirit and intended swpc of thc following claims. What is claimed is: The current limit increases tbc responsiveness of the regulation circuit b input voltage changes and delivers coostmt 1.A pulse width modulated switch comprising power output independent for the AC mains input voltage. , , a firs terminalr *> Although tbc presently preferred power supply of FIG. 8 a second terminal; utilizes current mode regulation and a feedback circuit that a switch comprising a control input, tbe switch allowing includes an optocoupkr and Zener diode, the present invena signal to be transmitted between said fint terminal tion is not to bc construed as to be limited to such a feedback and said second terminal zocording to a drive signal melbod or circuit. Either current or voltage mode regulation 3o provided at said contml input; may be utilized by the present invention without departing an oscillator that provides a maximum duty cycle signal fmm the spirit and scopc of the present invention so lonn as comprising an on-state and an off-state; P signal ibdiiative of the supplied to the b a d is a drive circuit that provides said drive signal according to supplied to k feedback terminal 825 of the regulation =id maximum duty cycle signal; and circuit 850. Additionally, although the presently preferred 35 power supplies both utilize an optocoupler and zcncr diode a soti start circuit that provides a signal instructing said as part of feedback circuits other feedback circuits may be drive circuit to disable said drive signal during at kast utilized by the present invention without departing from tbe a portion of said on-stalc of said maximum duty cycle. spirit and scope of the present invention. 2. The pulse width modulated switch of claim 1wherein Regulation circuit 850 also may have integrated sort start 40 said a first terminal, said second terminal, said switch, said oscillator, said drive circuit a d said soft start circuit comcapabilities. When tbc device to which the power supply is prise a monolithic device. coupled is switched on, a power up signal is generated 3. The pulse width modulated switch of daim 1 further within the internal circuitry of regulation circuit 850. A comprising an additional oscillator that pmrides a soft start power up signal is used to trigger soft start circuitry that signal to said soft start circuit, and wberein wbeo said soft rcduazs the duty cycle of the switch that operates within the start signal i removed said soft start circuit ccasiog opcras pulse width modulated switch 262 for a predetermined lion. period of time, which is presently preferred to be ten (10) 4. The pulse width modulated circuit of claim 3 wberein milliseconds. Once soft start operation is completed, regusaid additional oscillator further comprises latioo circuit 850 operates according to its regular duly cycle. a comparator that provides a comparator signal when a 50 Alternatively, or in addition to s o 8 start fundionality, magnitude of a refcrencc signal is greater than or equal regulation circuit 850 may also have frequency jitter functo a magnitude of said frequency variation oscillation signal, and tionality. That is, tbe switching frequency of the regulation circuit 850 varies according to an internal frequency variaan inverter &at receives said comparator signal ad tion signal. This has an advantage over the frequency jitter 5s provides said soft star( signal. operation of FIG. 1 in that the frequency range of the 5. The p u l s width modulated switch 01claim 1 further pnsntly regulation circuit 850 is known and fixed, and is comprising a frequency variation circuit that provides a not subject to the line voltage or load magnitude variations. Gequeacy variation signal, wbenin said oscillator provides Referring to FIG. 9, frequency variation circuit 405 and a oscillation signal and wherein said soft start circuit n main oscillator 465 funaion as described with resped to w provides said signal instructing said drive circuit to disable FIG. 3. In operation it is the variance of the high and low said drive signal when a magnitude of said oscillation signal states of maximum duty cycle signal 607 that generates thc i greater than a magnitude of said frequency variation frequency jincr functionality of the regulation circuit 850. A signal. 6. The pulse width modulated switch of claim 5 wherein presently preferred rcgulationcircuit 850 and its steady-slate operation is depicted and described in copending patent 65 said oscillator comprises an input that receives said freapplication Ser. No. 09/032520 which is hereby incorpoquency signal and said oscillation signal comprises a frerated by reference in i entirety. a quency range, and wherein said frequency of said oscillation

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signal varies within said frequency range according to a signal when a magnitude of said oscillation signal is greater magnitude of said frequency variation signal. than a magnitude of said frequency variation signal. 7. Thc pulse width modulated switch of claim 6 wherein 12. The regulation circuit of claim 9 furlher comprising an said oscillator hnther comprises a current source, wberein additional oscillator that provides a soft start signal to said ot said frequency of said oscillation signal is a function of a s soft start circuit, and wherein when said s f stan signal is sum of a magnitude of a current provided by said current removed said soft start circuit ceasing operation. source and said magnitude of said frequency variation 13. Tbe regulation circuit of claim l2 wberein said sigml. additional oscillator further comprises 8. pulse width modulated switch of claim 1 further a comparator that prwides a comparator signal when a 10 comprising magnitude of a reference signal is greater than or equal to a magnitude of said additionaloscillation signal, and a rectifier comprising a redifier input and a nctilier output,said rectifierinputrcccivinganACmaimsignal an inverter that receives d d comparator signal and and said rectifier output pmviding a rectifier signal; pmvidcs said soft start signal. 14.The regulation circuil of claim 9 further comprising a a power supply capacitor that receives said recti6ed signal; Is frequency variation circuit that pmvidcs a frquency variation signal and wherein said maximum time period varies ah comprising a k t t e r m h l and a temind, said first winding a S U ~ t a n t i a ~ yaccording to a magnitude of said frequency variation signal. 15. The regulation circuit of claim 9 further comprising a DC signal from power supply upatitor, said feeaack terminal and wherein when a signal k received at sccwd of first w a i n g wuplcd to d d of said width modulate. swiIc.,: and 20 said fccdback tcrminal said drive s i g ~ ai discontinued for ls first at kast One cyck' a -d n winding m;gnelically coupled to said.6rst 16. The regulation circuit of claim 9 wherein said first said 6rsl capable of being coupled to Icrminal, said second terminal, said oscillator and said soft I,.-A a ." ". e start circuit comprise a monolithic devia. 9. A regulation circuit comprising 17. Tho regulation circuit of claim 1 further comprising 6 a &st terminal; a ~vrrent limit circuit tbai p r w i d a a signal instrudine said a second terminal; drive circuit to discontinu; said drive s i b a l when a c k e n t received at said first terminal of said regulation circuit is a switcb comprising a control input, said switch allowing above a thnsboM k v e l a signal to be tr-ittcd between said first terminal and said second terminal according to a drive signal 30 18.Tbe regulation circuit of claim 9 further comprising pmnded at said w n m l input; a rectifier comprising a recti6er input and a rectifier output, said rediiier input rccciving an AC maim signal a drive circuit that provides said drive signal for a and said rectifier output pmviding a rectifier signal; maximum time period of a cycle; and a power supply capacimr that receives said rectified a soft start circuit that provides a s i p a l k m t i n g said 35 signak drive circuit to disable said drive signal during at l e s t a portion of said maximum time. period. a first winding comprising a first terminal and a second 10.Thc regulation circuit of claim 9 further comprising an terminal, said h winding receiving a substantially DC signal from said power supply capacitor, said oscillator that provides a maximum duty cycle signal to said second terminal of said first winding coupled to said drive circuit, said madmnm duty cyck signal comprising an 40 first terminal of said regulation circuit; and onslate for said maximum time period. 1. Tbe regulation circuit of claim 10 further comprkiig . a second winding magnetically coupled to said fitst a frequency variation circuit that provides a frequency winding, said first winding capable of being coupled to variation signal, wherein said oscillator provides an oscila load latioo signal and whcrein said soft stad circuit p r o v i k said + : + * + signal instructing said drive circuit to disable said drive

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