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INTERNATIONAL TELECOMMUNICATION UNION

ITU-T
TELECOMMUNICATION STANDARDIZATION SECTOR OF ITU

V.34
(09/94)

DATA COMMUNICATION OVER THE TELEPHONE NETWORK

A MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 28 800 bit/s FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TELEPHONE-TYPE CIRCUITS
ITU-T Recommendation V.34
(Previously "CCITT Recommendation")

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FOREWORD
The ITU-T (Telecommunication Standardization Sector) is a permanent organ of the International Telecommunication Union (ITU). The ITU-T is responsible for studying technical, operating and tariff questions and issuing Recommendations on them with a view to standardizing telecommunications on a worldwide basis. The World Telecommunication Standardization Conference (WTSC), which meets every four years, establishes the topics for study by the ITU-T Study Groups which, in their turn, produce Recommendations on these topics. The approval of Recommendations by the Members of the ITU-T is covered by the procedure laid down in WTSC Resolution No. 1 (Helsinki, March 1-12, 1993). ITU-T Recommendation V.34 was prepared by ITU-T Study Group 14 (1993-1996) and was approved under the WTSC Resolution No. 1 procedure on the 20th of September 1994.

___________________

NOTE In this Recommendation, the expression "Administration" is used for conciseness to indicate both a telecommunication administration and a recognized operating agency.

ITU 1994 All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from the ITU.

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CONTENTS
R V.34 (09/94)

Page 1 2 3 4 5 Scope .............................................................................................................................................................. References ...................................................................................................................................................... Definitions...................................................................................................................................................... Abbreviations ................................................................................................................................................. Line Signals.................................................................................................................................................... 5.1 Data Signalling Rates........................................................................................................................ 5.2 Symbol Rates .................................................................................................................................... 5.3 Carrier Frequencies........................................................................................................................... 5.4 Pre-emphasis..................................................................................................................................... 5.4.1 Transmit Spectrum Specifications .................................................................................... 5.4.2 Selection Method .............................................................................................................. DTE Interfaces ............................................................................................................................................... 6.1 Synchronous Interfacing (Primary Channel Only) ........................................................................... 6.2 Asynchronous Character-mode Interfacing ...................................................................................... 6.2.1 Primary Channel ............................................................................................................... 6.2.2 Secondary Channel ........................................................................................................... 6.3 Half-duplex Mode Interfacing .......................................................................................................... 6.4 Electrical Characteristics of Interchange Circuits............................................................................. 6.4.1 Primary Channel ............................................................................................................... 6.4.2 Secondary Channel ........................................................................................................... 6.5 Fault Condition on Interchange Circuits........................................................................................... 6.6 Thresholds and Response Times of Circuit 109 ............................................................................... 6.6.1 Duplex Mode .................................................................................................................... 6.6.2 Half-Duplex Mode ............................................................................................................ Scrambler ....................................................................................................................................................... Framing .......................................................................................................................................................... 8.1 Overview .......................................................................................................................................... 8.2 Mapping Frame Switching................................................................................................................ 8.3 Multiplexing of Primary and Auxiliary Channel Bits....................................................................... Encoder .......................................................................................................................................................... 9.1 Signal Constellations ........................................................................................................................ 9.2 Mapping Parameters ......................................................................................................................... 9.3 Parser ................................................................................................................................................ 9.3.1 Procedure for b > 12 ......................................................................................................... 9.3.2 Procedure for b 12 ........................................................................................................ 9.4 Shell Mapper..................................................................................................................................... 9.5 Differential Encoder ......................................................................................................................... 9.6 Mapper, Precoder and Trellis Encoder ............................................................................................. 9.6.1 Mapper .............................................................................................................................. 9.6.2 Precoder ............................................................................................................................ 9.6.3 Trellis Encoder.................................................................................................................. 9.7 Non-linear Encoder........................................................................................................................... Start-up Signals and Sequences...................................................................................................................... 10.1 Signals and Sequences Used in Duplex Operation ........................................................................... 10.1.1 Phase 1 .............................................................................................................................. 10.1.2 Phase 2 .............................................................................................................................. 10.1.3 Phases 3 and 4................................................................................................................... 10.2 Signals and Sequences Used in Half-duplex Operation ................................................................... 10.2.1 Phase 1 .............................................................................................................................. 10.2.2 Phase 2 .............................................................................................................................. 10.2.3 Phase 3 .............................................................................................................................. 10.2.4 Control channel modulation.............................................................................................. Recommendation V.34 (09/94) 1 1 2 3 4 4 4 4 5 5 6 6 7 8 8 8 9 9 9 9 9 9 9 9 10 10 10 11 11 13 13 14 18 18 18 18 20 20 21 21 22 25 25 25 25 26 31 36 36 36 36 37 i

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7 8

9

10

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11

Duplex Operating Procedures ........................................................................................................................ 11.1 Phase 1 ­ Network Interaction.......................................................................................................... 11.1.1 Call Modem ...................................................................................................................... 11.1.2 Answer Modem................................................................................................................. 11.2 Phase 2 ­ Probing/Ranging............................................................................................................... 11.2.1 Error Free Procedures ....................................................................................................... 11.2.2 Recovery Mechanisms ...................................................................................................... 11.3 Phase 3 ­ Equalizer and Echo Canceller Training............................................................................ 11.3.1 Error Free Procedure......................................................................................................... 11.3.2 Recovery Mechanisms ...................................................................................................... 11.4 Phase 4 ­ Final Training ................................................................................................................... 11.4.1 Error Free Procedure......................................................................................................... 11.4.2 Recovery Mechanism........................................................................................................ 11.5 Retrains ............................................................................................................................................. 11.5.1 Call Modem ...................................................................................................................... 11.5.2 Answer Modem................................................................................................................. 11.6 Rate Renegotiation............................................................................................................................ 11.6.1 Error Free Procedure......................................................................................................... 11.6.2 Recovery Mechanism........................................................................................................ 11.7 Cleardown......................................................................................................................................... 11.7.1 Initiating Modem............................................................................................................... 11.7.2 Responding Modem .......................................................................................................... 11.8 Two-wire Leased Line Operation ..................................................................................................... 11.8.1 Call Modem ...................................................................................................................... 11.8.2 Answer Modem................................................................................................................. Half-duplex Operating Procedures................................................................................................................. 12.1 Phase 1 ­ Network Interaction.......................................................................................................... 12.2 Phase 2 ­ Probing ............................................................................................................................. 12.2.1 Call Modem as Source Modem......................................................................................... 12.2.2 Answer Modem as Source Modem ................................................................................... 12.3 Phase 3 ­ Primary Channel Equalizer Training ................................................................................ 12.3.1 Source Modem .................................................................................................................. 12.3.2 Recipient Modem.............................................................................................................. 12.3.3 Recipient Modem Error Recovery Procedures ................................................................. 12.4 Control Channel Start-up .................................................................................................................. 12.4.1 Source Modem .................................................................................................................. 12.4.2 Recipient Modem.............................................................................................................. 12.5 Primary Channel Resynchronization Procedure ............................................................................... 12.5.1 Source Modem .................................................................................................................. 12.5.2 Recipient Modem.............................................................................................................. 12.5.3 Primary Channel Turn-off................................................................................................. 12.6 Control Channel Resynchronization Procedure................................................................................ 12.6.1 Source Modem .................................................................................................................. 12.6.2 Recipient Modem.............................................................................................................. 12.6.3 Control Channel Turn-off ................................................................................................. 12.7 Primary Channel Retrains ................................................................................................................. 12.7.1 Call Modem ­ Source or Recipient................................................................................... 12.7.2 Answer Modem ­ Source or Recipient ............................................................................. 12.8 Control Channel Retrains.................................................................................................................. 12.8.1 Initiating Retrain ............................................................................................................... 12.8.2 Responding to Retrain....................................................................................................... Testing Facilities ............................................................................................................................................ Glossary.......................................................................................................................................................... 14.1 Variables and Parameters used in Data mode (clauses 5 to 9)..........................................................

40 40 40 41 41 42 43 44 45 46 46 46 48 49 49 49 50 50 51 52 52 52 52 52 52 52 53 53 53 55 56 56 57 57 57 57 58 59 59 59 59 59 59 60 60 61 61 61 62 62 62 62 62 62

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13 14

ii

Recommendation V.34 (09/94)

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Recommendation V.34
Recommendation V.34 (09/94)

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A MODEM OPERATING AT DATA SIGNALLING RATES OF UP TO 28 800 bit/s FOR USE ON THE GENERAL SWITCHED TELEPHONE NETWORK AND ON LEASED POINT-TO-POINT 2-WIRE TELEPHONE-TYPE CIRCUITS
(Geneva, 1994)

1

Scope

This modem is intended for use on connections on general switched telephone networks (GSTNs) and on point-to-point 2-wire leased telephone-type circuits. The principal characteristics of the modem are as follows: a) b) c) duplex and half-duplex modes of operation on GSTN and point-to-point 2-wire leased circuits; channel separation by echo cancellation techniques; quadrature amplitude modulation (QAM) for each channel with synchronous line transmission at selectable symbol rates including the mandatory rates of 2400, 3000, and 3200 symbols/s and the optional rates of 2743, 2800, and 3429 symbols/s; synchronous primary channel data signalling rates of: ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ e) f) g) h) i) 28 800 bit/s; 26 400 bit/s; 24 000 bit/s; 21 600 bit/s; 19 200 bit/s; 16 800 bit/s; 14 400 bit/s; 12 000 bit/s; 1 9600 bit/s; 1 7200 bit/s; 1 4800 bit/s; 1 2400 bit/s;

d)

trellis coding for all data signalling rates; an optional auxiliary channel with a synchronous data signalling rate of 200 bit/s, a portion of which may be provided to the user as an asynchronous secondary channel; adaptive techniques that enable the modem to achieve close to the maximum data signalling rate the channel can support on each connection; exchange of rate sequences during start-up to establish the data signalling rate; automoding to V-Series modems supported by V.32 bis Automode procedures and Group 3 facsimile machines.

2

References

The following ITU-T Recommendations and other references contain provisions which, through reference in this text, constitute provisions of this Recommendation. At the time of publication, the editions indicated were valid. All Recommendations and other referenced Standards are subject to revision; all users of this Recommendation are therefore Recommendation V.34 (09/94) 1

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encouraged to investigate the possibility of applying the most recent editions of the Recommendations and other references listed below. A list of currently valid ITU-T Recommendations is regularly published. ­ ­ ­ ­ ­ ­ ­ ­ ­ ­ ISO 2110:1989, Information technology ­ Data communications ­ 25-pole DTE/DCE interface connector and contact number assignments. ISO/IEC 11569:1993, Information technology ­ Telecommunications and information exchange between systems ­ 26-pole interface connector mateability and contact number assignments. ITU-T (CCITT) Recommendation T.30 (1988) (Amended, March 1991), Procedures for document facsimile transmission in the general switched telephone network. ITU-T Recommendation V.8 (1994), Procedures for starting and ending sessions of data transmission over the general switched telephone network. ITU-T (CCITT) Recommendation V.10 (1993), Electrical characteristics for unbalanced double-current interchange circuits operating at data signalling rates nominally up to 100 kbit/s. ITU-T (CCITT) Recommendation V.11 (1993), Electrical characteristics for balanced double-current interchange circuits operating at data signalling rates up to 100 kbit/s. ITU-T (CCITT) Recommendation V.14 (1988), Transmission of start-stop characters over synchronous bearer channels. ITU-T (CCITT) Recommendation V.21 (1988), 300 bit per second duplex modem standardized for use in the general switched telephone network. ITU-T (CCITT) Recommendation V.24 (1988), List of definitions for interchange circuits between data terminal equipment (DTE) and data circuit-terminating equipment (DCE). ITU-T (CCITT) Recommendation V.25 (1984), Automatic answering equipment and/or parallel automatic calling equipment on the general switched telephone network including procedures for disabling of echo control devices for both manually and automatically established calls. ITU-T (CCITT) Recommendation V.28 (1993), Electrical characteristics for unbalanced double-current interchange circuits. ITU-T (CCITT) Recommendation V.32 (1988), A family of 2-wire, duplex modems operating at data signalling rates of up to 9600 bit/s for use on the general switched telephone network and on leased telephone-type circuits. ITU-T (CCITT) Recommendation V.32 bis (1991), A duplex modem operating at data signalling rates of up to 14 400 bit/s for use on the general switched telephone network and on leased point-to-point 2-wire telephone-type circuits. ITU-T (CCITT) Recommendation V.42 (1993), Error-correcting procedures for DCEs using asynchronous-to-synchronous conversion. ITU-T (CCITT) Recommendation V.54 (1988), Loop test devices for modems.

­ ­

­

­ ­

3

Definitions

For the purposes of this Recommendation, the following definitions apply: auxiliary channel: A 200 bit/s data channel which, along with the primary channel, is multiplexed into the bit stream transmitted by the modem. Data conveyed in the auxiliary channel is independent from the primary channel and may consist of secondary channel data and modem control data. constellation shaping: A method for improving noise immunity by introducing a non-uniform two-dimensional probability distribution for transmitted signal points. The degree of constellation shaping is a function of the amount of constellation expansion. data mode modulation parameters: Parameters determined during start-up and used during data mode transmission. frame switching: A method for sending a fractional number of bits per mapping frame, on average, by alternating between sending an integer b ­ 1 bits per mapping frame and b bits per mapping frame according to a periodic switching pattern. 2 Recommendation V.34 (09/94)

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line probing: A method for determining channel characteristics by sending periodic signals, which are analysed by the modem and used to determine data mode modulation parameters. nominal transmit power: Reference transmit power that is configured by the user. A modem that has negotiated a transmit power reduction in Phase 2 of the start-up procedures is said to be transmitting below the Nominal Transmit Power. non-linear encoding: A method for improving distortion immunity near the perimeter of a signal constellation by introducing a non-uniform two-dimensional (2D) signal point spacing. precoding: A non-linear equalization method for reducing equalizer noise enhancement caused by amplitude distortion. Equalization is performed at the transmitter using precoding coefficients provided by the remote modem. pre-emphasis: A linear equalization method where the transmit signal spectrum is shaped to compensate for amplitude distortion. The pre-emphasis filter is selected using a filter index provided by the remote modem. primary channel: The main data channel which, together with auxiliary channel data, constitutes the bit stream transmitted by the modem. recipient modem: The modem which receives primary channel data in half-duplex mode. secondary channel: A portion of the auxiliary channel that is made available to the user. shell mapping: A method for mapping data bits to signal points in a multi-dimensional signal constellation, which involves partitioning a two-dimensional signal constellation into rings containing an equal number of points. source modem: The modem which transmits primary channel data in half-duplex mode. trellis encoding: A method for improving noise immunity using a convolutional coder to select a sequence of subsets in a partitioned signal constellation. The trellis encoders used in this Recommendation are all four-dimensional (4D) and they are used in a feedback structure where the inputs to the trellis encoder are derived from the signal points.

4

Abbreviations
abs[ ] AMP CCITT CME CRC DCE DPSK DTE GPA GPC GSTN IEC ISO ITU-T LSB MSB QAM QPSK RTDEa RTDEc SWP Absolute value Auxiliary Channel Multiplexing Pattern International Telephone and Telegraph Consultative Committee Circuit Multiplication Equipment Cyclic Redundancy Check Data Circuit Terminating Equipment Differential Phase Shift Keying Data Terminal Equipment Generating Polynomial ­ Answer modem Generating Polynomial ­ Call modem General Switched Telephone Network International Electrotechnical Commission International Organization for Standardization International Telecommunications Union ­ Telecommunications Standardization Sector Least Significant Bit Most Significant Bit Quadrature Amplitude Modulation Quadrature Phase Shift Keying Round-Trip Delay Estimate ­ Answer modem Round-Trip Delay Estimate ­ Call modem Switching Pattern Recommendation V.34 (09/94) 3

For the purposes of this Recommendation, the following abbreviations are used:

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5.1

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Line Signals
Data Signalling Rates

The primary channel shall support synchronous data signalling rates of 2400 bit/s to 28 800 bit/s in multiples of 2400 bit/s. An auxiliary channel with a synchronous data signalling rate of 200 bit/s may also be optionally supported. The primary and auxiliary data signalling rates shall be determined during Phase 4 of modem start-up according to the procedures described in 11.4. or 12.4. The auxiliary channel shall be used only when the call and answer modems have both declared this capability. The primary channel data signalling rates can be asymmetric.

5.2

Symbol Rates

The symbol rate shall be S = (a/c) · 2400 ± 0.01% two-dimensional (2D) symbols per second, where a and c are integers from the set specified in Table 1 (in which symbol rates are shown rounded to the nearest integer). The symbol rates 2400, 3000, and 3200 are mandatory; 2743, 2800, and 3429 are optional. The symbol rate shall be selected during Phase 2 of modem start-up according to the procedures described in 11.2 or 12.2. Asymmetric symbol rates are optionally supported and shall be used only when the call and answer modems have both declared this capability.

TABLE 1/V.34 Symbol rates
Symbol Rate, S 2400 2743 2800 3000 3200 3429 a 11 18 17 15 14 10 c 1 7 6 4 3 7

5.3

Carrier Frequencies

The carrier frequency shall be (d/e) · S Hz, where d and e are integers. One of two carrier frequencies can be selected at each symbol rate, as specified in Table 2, which gives the values of d and e and the corresponding frequencies rounded to the nearest integer. The carrier frequency shall be determined during Phase 2 of modem start-up according to the procedures specified in 11.2 or 12.2. Asymmetric carrier frequencies shall be supported.

TABLE 2/V.34 Carrier frequencies versus symbol rate
Low Carrier Symbol Rate, S 2400 2743 2800 3000 3200 3429 Frequency 1600 1646 1680 1800 1829 1959 d 2 3 3 3 4 4 e 3 5 5 5 7 7 Frequency 1800 1829 1867 2000 1920 1959 High Carrier d 3 2 2 2 3 4 e 4 3 3 3 5 7

4

Recommendation V.34

(09/94)

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5.4
5.4.1

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Pre-emphasis
Transmit Spectrum Specifications

The transmit spectrum specifications use a normalized frequency, which is defined as the ratio f/S, where f is the frequency in Hz and S is the symbol rate. The magnitude of the transmitted spectrum shall conform to the templates shown in Figures 1 and 2 for normalized frequencies in the range from (d/e ­ 0.45) to (d/e + 0.45). The transmitted spectrum shall be measured using a 600 pure resistive load.



Magnitude (dB)
0 0

0.2

0.4

0.6

0.8

1.0

1.2
T1400610-94/d01

Normalized frequency, f(Hz)/S

NOTE ­ Tolerance for transmit spectrum is ± 1 dB.

FIGURE 1/V.34 Transmit spectra templates for indices 0 to 5
FIGURE 1/V.34...[D01] = 11 CM (118%)

TABLE 3/V.34 Parameter for indices 0 to 5
Index 0 1 2 3 4 5 10 dB 12 dB 14 dB 16 dB 18 dB 10 dB

Recommendation V.34

(09/94)

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Magnitude (dB)



0

0

0.2

0.4

0.6

0.8

1.0

1.2
T1400620-94/d02

Normalized frequency, f(Hz)/S

NOTE ­ Over the range specified, the tolerance for the transmit spectrum magnitude is ± 1 dB.

FIGURE 2/V.34 Transmit spectra templates for indices 6 to 10
FIGURE 2/V.34...[D02] = 11 CM (118%)

TABLE 4/V.34 Parameters and for indices 6 to 10
Index 16 17 18 19 10 0.5 dB 1.0 dB 1.5 dB 2.0 dB 2.5 dB 1.0 dB 2.0 dB 3.0 dB 4.0 dB 5.0 dB

5.4.2

Selection Method

The transmitted spectrum shall be specified by a numerical index. The index shall be provided by the remote modem during Phase 2 of start-up by the procedures defined in 11.2. or 12.2.

6

DTE Interfaces

Where external physical interfaces for the interchange circuits are not present, the equivalent functionality of the circuits must still be provided (see Table 5). 6 Recommendation V.34 (09/94)

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Interchange circuits for combined primary and secondary channel interfaces
Interchange Circuit No. 102 103 104 105 106 107 108/1 or 108/2 109 113 114 115 125 133 140 141 142 118 119 120 121 122 NOTES 1 When the modem is not operating in a synchronous mode at the interface, any signals on this circuit shall be disregarded. Many DTEs operating in an asynchronous mode do not have a generator connected to this circuit. 2 When the modem is not operating in a synchronous mode at the interface, this circuit shall be clamped to the OFF condition. Many DTEs operating in an asynchronous mode do not terminate this circuit. 3 4 5 6 Operation of circuit 133 shall be in accordance with 7.3.1/V.42. This circuit is provided where the optional secondary channel is implemented without a separate interface. This circuit need only be provided where required by the application. This circuit is in the ON condition if circuit 109 is in the ON condition and the optional secondary channel is enabled. Signal ground or common return Transmitted data Received data Request to send Ready for sending Data set ready Connect data set to line Data terminal ready Data channel received line signal detector Transmitter signal element timing (DTE source) Transmitter signal element timing (DCE source) Receiver signal element timing (DCE source) Calling indicator Ready for receiving Loopback/maintenance Local loopback Test indicator Transmitted secondary channel data Received secondary channel data Transmit secondary channel line signal Secondary channel ready Secondary channel received line signal detector 1 2 2 3 Description

NOTES

4 4 4, 5 4, 5 4, 5, 6

Where a separate interface is provided for the optional secondary channel, interchange circuits as specified in Table 6 shall be provided.

6.1

Synchronous Interfacing (Primary Channel Only)

The modems shall accept synchronous data from the DTE on circuit 103 (see Recommendation V.24) under control of circuit 113 or 114. The modem shall pass synchronous data to the DTE on circuit 104 under control of circuit 115. The modem shall provide to the DTE a clock on circuit 114 for transmit-data timing, and a clock on circuit 115 for receive-data timing. The transmit-data timing may, however, originate in the DTE and be transferred to the modem via circuit 113. In some applications, it may be necessary to synchronize the transmitter timing to the receiver timing inside the modem. After the start-up and retrain sequences, circuit 106 must follow the state of circuit 105 within 2 ms. OFF to ON and ON to OFF transitions of circuit 109 shall occur solely in accordance with the operating sequences defined in clauses 11 and 12. Recommendation V.34 (09/94) 7

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Interchange circuits for a separate secondary channel interface
Interchange Circuit No. 102 103 104 105 106 107 108/2 109 NOTES 1 This circuit need only be provided where required by the application. 2 This circuit is in the ON condition if the corresponding interchange circuit of the primary channel is in the ON condition and the optional secondary channel is enabled. Signal ground or common return Transmitted data Received data Request to send Ready for sending Data set ready Data terminal ready Data channel received line signal detector Description

NOTES

1

1, 2 1 1, 2

6.2
6.2.1

Asynchronous Character-mode Interfacing
Primary Channel

The modem may include an asynchronous-to-synchronous converter interfacing to the DTE in an asynchronous (or start-stop character) mode. The protocol for the conversion shall be in accordance with Recommendation V.14 or V.42. Data compression may also be employed. 6.2.2 Secondary Channel

The secondary channel is for asynchronous mode only. However, since the modulation process operates synchronously, an asynchronous-to-synchronous conversion combined with a data flow control shall be provided, as specified in 6.2.2.1. 6.2.2.1 DTE-to-DCE Flow Control on the Secondary Channel Interface

The modem shall indicate to the secondary channel DTE a temporary inability to accept data on either circuit 103 or 118 (DCE-not-ready condition). Upon receiving such an indication, the DTE should complete transmission of any partially transmitted character and then cease transmitting data on circuit 103 (118) and clamp circuit 103 (118) to binary 1. When the DCE-not-ready condition is cleared, the DTE may resume the transmission of data on circuit 103 (118). The flow control indication may be performed in one of two ways: a) b) Using circuit 106 (121) ­ A DCE-not-ready condition may be indicated by turning circuit 106 (121) OFF and cleared by turning circuit 106 (121) ON. Using DC1/DC3 characters (XON/XOFF functions) ­ A DCE-not-ready condition may be indicated by transmitting a DC3 character and cleared by transmitting a DC1 character on circuit 104 (119).

Both techniques a) and b) shall be provided. The choice of technique is a user-configurable option. The response time of the DTE to an indication of a DCE-not-ready condition is for further study. This time should be kept as short as possible. DCEs shall accommodate latency in the DTE recognition of the DCE-not-ready indication by accepting additional characters on circuit 103 (118) after the indication is given.

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(09/94)

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If a break signal is the next item to be delivered across the DTE/DCE interface, it shall be delivered regardless of the flow control state. In the case of a non-expedited/non-destructive break, data to be delivered prior to the break remains subject to flow control.
NOTES 1 No DCE-to-DTE flow control is provided on the secondary channel. 2 The alternative use of the asynchronous-to-synchronous conversion in accordance with Recommendation V.14 is still under consideration; in this case, DTE-to-DCE flow control may be optional.

6.3

Half-duplex Mode Interfacing

Where the modem is operating in the half-duplex mode, the primary channel and control channel share the primary channel interchange circuits given in Table 5. The mechanism for allocation of data to the primary or control channel is beyond the scope of this Recommendation.

6.4
6.4.1

Electrical Characteristics of Interchange Circuits
Primary Channel

Where an external physical interface is provided, electrical characteristics conforming to Recommendations V.10 and V.11 shall be used. The connector and pole assignments specified by ISO 2110 Amd. 1.0 or ISO/IEC 11569, column "V-Series > 20 000 bit/s", shall be used. Alternatively, when the DTE-DCE interface speed is not designed to exceed 116 kbit/s, these same connectors may be used with characteristics conforming to Recommendation V.10 only (see Note).
NOTE ­ In this case ISO is presently considering assigning the same pole assignments in ISO 2110 and ISO/IEC 11569 as those presently assigned for interfaces using Recommendation V.28 electrical characteristics under the heading "V-Series < 20 000 bit/s".

6.4.2

Secondary Channel

Where an external physical interface is provided for the secondary channel, electrical characteristics in accordance with Recommendation V.10 shall be used (see Note under 6.4.1).

6.5

Fault Condition on Interchange Circuits

The DCE shall interpret a fault condition on circuits 105, 108 and 120 (where provided) as an OFF condition using failure detection type 1. All other circuits not referred to may use failure detection type 0 or 1.
NOTES 1 2 The DTE interprets a fault condition on circuit 107 as an OFF condition using failure detection type 1. See clause 10/V.10 for the definition of failure detection types.

6.6
6.6.1

Thresholds and Response Times of Circuit 109
Duplex Mode

Thresholds and response times are not applicable in duplex mode because a line signal detector cannot be expected to distinguish wanted received signals from unwanted talker echoes. 6.6.2 Half-Duplex Mode

Circuit 109 shall turn OFF 20 to 25 ms after the level of the received signal appearing at the line terminals of the modem falls below the relevant threshold defined as follows: Greater than ­ 43 dBm: Less than ­ 48 dBm: circuit 109 ON circuit 109 OFF

The condition of circuit 109 between the ON and OFF levels is not specified except that the signal detector shall provide hysteresis, such that the level at which the OFF to ON transition occurs shall be at least 2 dB greater than that for the ON to OFF transition. Recommendation V.34 (09/94) 9

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A self-synchronizing scrambler shall be included in the modem for the primary channel data. Auxiliary channel data is not scrambled. Each transmission direction uses a different scrambler. According to the direction of transmission, the generating polynomial is:

Call mode modem generating polynomial: or

(GPC) = 1 + x­18 + x­23

(7-1/V.34) (7-2/V.34)

Answer mode modem generating polynomial: (GPA) = 1 + x­5 + x­23

At the transmitter, the scrambler shall effectively divide the primary channel data sequence by the generating polynomial. The coefficients of the quotients of this division, taken in descending order, form the data sequence which shall appear at the output of the scrambler.

8
8.1

Framing
Overview

Figure 3 provides an overview of the frame structure.

Superframe: 280 ms 0 1 J-1 J = 7 or 8

Data frame: 40 or 35 ms 0 1 P-1 P = 12, 14, 15 or 16

Mapping frame j=0 1 2 3

4D Symbol Interval k=0 1

T1400630-94/d03

FIGURE 3/V.34 Overview of framing and indexing
FIGURE 3/V.34...[D03] = 11 CM (118%)

The duration of a superframe is 280 ms. A superframe shall consist of J data frames, where J = 7 at symbol rates 2400, 2800, 3000, and 3200, and J = 8 at symbol rates 2743 and 3429. A data frame shall consist of P mapping frames, where P is specified in Table 7. A mapping frame shall consist of four four-dimensional (4D) symbol intervals. A 4D symbol interval shall consist of two 2D symbol intervals. A bit inversion method shall be used for superframe synchronization (see 9.6.3). 10 Recommendation V.34 (09/94)

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Framing parameters
Symbol Rate, S 2400 2743 2800 3000 3200 3429 J 7 8 7 7 7 8 P 12 12 14 15 16 15

Mapping frames are indicated by the time index i, where i = 0 for the first mapping frame of signal B1 defined in 10.1.3.1, and is incremented by 1 for each mapping frame thereafter. 4D symbol intervals are indicated by the time index m = 4i + j, where j (= 0, 1, 2, 3) is a cyclic time index that indicates the position of the 4D symbol interval in a mapping frame. 2D symbol intervals are indicated by the time index n = 2m + k, where k (= 0, 1) is a cyclic time index that indicates the position of the 2D symbol interval in a 4D symbol interval.

8.2

Mapping Frame Switching

An integer number of data bits shall be transmitted in every data frame. The total number of primary and auxiliary channel data bits transmitted in a data frame is denoted by:

N = R · 0.28/J
where R is the sum of the primary channel data signalling rate and the auxiliary channel data signalling rate.

(8-1/V.34)

The total number of (primary and auxiliary channel) data bits transmitted in a mapping frame shall vary between b ­ 1 ("low frame") and b ("high frame") bits according to a periodic switching pattern SWP, of period P, such that the average number of data bits per mapping frame is N/P. The value of b is defined as the smallest integer not less than N/P. The number of high frames in a period is the remainder

r = N ­ (b ­ 1)P
where 1 r P

(8-2/V.34)

SWP is represented by 12 to 16-bit binary numbers where 0 and 1 represent low and high frames, respectively. The left-most bit corresponds to the first mapping frame in a data frame. The right-most bit is always 1. SWP may be derived using an algorithm which uses a counter as follows: Prior to each data frame the counter is set to zero. The counter is incremented by r at the beginning of each mapping frame. If the counter is less than P, send a low frame; otherwise, send a high frame and decrement the counter by P. Table 8 gives the values for b and SWP for all combinations of data rate and symbol rate. In Table 8, SWP is represented as a hexadecimal number. For example, at 19 200 bit/s and symbol rate 3000, SWP is 0421 (hex) or 000 0100 0010 0001 (binary).

8.3

Multiplexing of Primary and Auxiliary Channel Bits

The auxiliary channel bits shall be time-division multiplexed with the scrambled primary channel bits. The number of auxiliary channel bits transmitted per data frame is W = 8 at symbol rates 2400, 2800, 3000, and 3200, and W = 7 at symbol rates 2743 and 3429. In each mapping frame, the bit I1i,0 is used to send either an auxiliary channel bit or a primary channel bit according to the auxiliary channel multiplexing pattern, AMP, of period P (see Figure 4). AMP can be represented as a P-bit binary number where a 1 indicates that an auxiliary channel bit is sent and a 0 indicates that a primary channel bit is sent. AMP depends only upon the symbol rate and is given in Table 9 as a hexadecimal number. The left-most bit corresponds to the first mapping frame in a data frame. Recommendation V.34 (09/94) 11

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[b, Switching Pattern (SWP)] as a function of data rate and symbol rate
2400 sym/s P = 12 b 18 19 16 17 24 25 32 33 40 41 48 49 56 57 64 65 72 73 ­ ­ ­ ­ ­ ­ SWP FFF 6DB FFF 6DB FFF 6DB FFF 6DB FFF 6DB FFF 6DB FFF 6DB FFF 6DB FFF 6DB ­ ­ ­ ­ ­ ­ b ­ ­ 14 15 21 22 28 29 35 36 42 43 49 50 56 57 63 64 70 71 ­ ­ ­ ­ 2743 sym/s P = 12 SWP ­ ­ FFF 56B FFF 56B FFF 56B FFF 56B FFF 56B FFF 56B FFF 56B FFF 56B FFF 56B ­ ­ ­ ­ b ­ ­ 14 15 21 22 28 28 35 35 42 42 48 49 55 56 62 63 69 70 ­ ­ ­ ­ 2800 sym/s P = 14 SWP ­ ­ 1BB7 0489 15AB 0081 0A95 3FFF 0489 1FBF 0081 1BB7 3FFF 15AB 1FBF 0A95 1BB7 0489 15AB 0081 ­ ­ ­ ­ b ­ ­ 13 14 20 20 26 27 32 33 39 39 45 46 52 52 58 59 64 65 71 71 ­ ­ 3000 sym/s P = 15 SWP ­ ­ 3DEF 1249 0421 3777 2D6B 0081 7FFF 2AAB 14A5 3FFF 3DEF 1249 0421 3777 2D6B 0081 7FFF 2AAB 14A5 3FFF ­ ­ b ­ ­ 12 13 18 19 24 25 30 31 36 37 42 43 48 49 54 55 60 61 66 67 72 73 3200 sym/s P = 16 SWP ­ ­ FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 FFFF 5555 b ­ ­ 12 12 17 18 23 23 28 29 34 35 40 40 45 46 51 51 56 57 62 63 68 68 3429 sym/s P = 15 SWP ­ ­ 0421 36DB 3DEF 0889 14A5 3F7F 7FFF 1555 2D6B 0001 0421 36DB 3DEF 0889 14A5 3F7F 7FFF 1555 2D6B 0001 0421 36DB

Data Rate, R 12400 12600 14800 15000 17200 17400 19600 19800 12 000 12 200 14 400 14 600 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200 26 400 26 600 28 800 29 000

The auxiliary channel multiplexing pattern may be derived using an algorithm similar to the algorithm for SWP, the frame switching pattern. Prior to each data frame, a counter is set to zero. The counter is incremented by W at the beginning of each mapping frame. If the counter is less than P, a primary channel bit is sent; otherwise, an auxiliary channel bit is sent, and the counter is decremented by P.

TABLE 9/V.34 Auxiliary channel multiplexing parameters
Symbol Rate, S 2400 2743 2800 3000 3200 3429 W 8 7 8 8 8 7 P 12 12 14 15 16 15 AMP 6DB 56B 15AB 2AAB 5555 1555

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The block diagram in Figure 4 is an overview of the encoder.

{Qi, j,k ,1,Qi, j,k ,2,...,Qi,j,k ,q } {Si,1,...,Si,K - 1}
Data Si,K 0 Shell Mapper

{mi, j,k }
x(n) u(n) Precoder Non-linear Encoder x(n)

I2 i, j
Data

SWP (K > 0) Differential Encoder Z(m) MAP

I3 i, j
0 SWP (K = 0) Primary Auxiliary AMP

c(n)

y(n)

I1i,j U0 (m)

Trellis Encoder
T1400640-94/d04

FIGURE 4/V.34 Encoder block diagram
FIGURE 4/V.34...[D04] = 11.5 CM (118%)

9.1

Signal Constellations

Signal constellations consist of complex-valued signal points which lie on a two-dimensional rectangular grid. All signal constellations used in this Recommendation are subsets of a 960-point superconstellation. Figure 5 shows one-quarter of the points in the superconstellation. These points are labelled with decimal integers between 0 and 239. The point with the smallest magnitude is labelled as 0, the point with the next larger magnitude is labelled as 1, and so on. When two or more points have the same magnitude, the point with the greatest imaginary component is taken first. The full superconstellation is the union of the four quarter-constellations obtained by rotating the constellation in Figure 5 by 0, 90, 180, and 270 degrees. A signal constellation with L points consists of the L/4 points from the quarter-constellation in Figure 5 with labels 0 through L/4 ­ 1, and the 3L/4 points which are obtained by 90, 180 and 270 degree rotations of these signal points.

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9 13 17 21 25 29

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33 37 37 33 29 25 21 17 13 9 5 1 ­3 ­7 ­11 ­15 ­19 ­23 ­27 ­31 ­35

­39 ­35 ­31 ­27 ­23 ­19 ­15 ­11 ­7 37 33 29 25 21 17 13 9 5 1 ­3 ­7 ­11 ­15 ­19 ­23 ­27 ­31 ­35 ­39 ­35 ­31 ­27 ­23 ­19 ­15 ­11 ­7

(lm) 236 224 216 212 218 228 234 206 185 173 164 162 170 181 197 220 226 193 165 146 133 123 121 125 137 154 179 207 229 189 156 131 110 96 201 160 126 98 222 177 135 102 77 203 158 119 84 194 148 108 75 238 186 142 103 69 190 144 106 73 199 152 113 80 210 167 128 94 60 50 43 45 52 67 79 55 39 28 22 25 33 47 68 64 41 24 13 9 11 19 34 53 82 87 58 35 17 6 1 3 12 27 46 74 83 92 100 117 140 172 208 54 62 31 37 15 20 4 0 2 8 5 7 71 48 30 21 16 18 26 40 61 90 112 141 180 221 65 49 38 32 36 42 57 78 91 118 155 198 72 101 138 182 230 63 56 59 66 93 127 171 219 85 122 163 213 (Re) 88 124 166 217 97 134 174 225

10 14 23 29 44 51 70 76

81 111 147 182 237 99 132 168 209

232 183 149 115 89

214 175 139 116 95

86 104 129 157 195 235

205 176 150 130 114 107 105 109 120 136 161 191 227 215 184 169 153 145 143 151 159 178 202 231 233 211 200 192 188 196 204 223 239 ­3 1 5 9 13 17 21 25 29 33 37

T1400650-94/d05

FIGURE 5/V.34 One-quarter of the points in the superconstellation
FIGURE 5/V.34...[D05] = 14.5 CM (118%)

9.2

Mapping Parameters

The number of bits put into the shell mapper per mapping frame is denoted by K where 0 K < 32. The values of K are given in Table 10. K can also be determined from b as follows:

K = 0 = b ­ 12 ­ 8q

if b 12 if b > 12

(9-1/V.34)

where q is the smallest non-negative integer such that K < 32 (q = 0 when K = 0). The 2D signal constellation is partitioned into M concentric rings of equal size. For each data rate and symbol rate, two possible values of M are allowed: a "minimum" value which minimizes the number of points in the 2D signal constellation, and a larger value which allows the achievement of shaping gain. M is selected during Phase 4 of the start-up procedures as described in 11.4 or 12.4. The values of M are given in Table 10. These values can also be calculated from K as follows: the minimum value of M is the smallest integer no less than 2K/8 and the larger value of M is the nearest integer to 1.25 · 2K/8 (not less than the minimum value of M). Table 10 gives the number of signal points L in the 2D signal constellation. L can also be calculated according to:

L = 4M · 2q

(9-2/V.34)

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TABLE 10/V.34 Mapping parameters K, M and L at different data rates and symbol rates
M Minimum 10 10 14 15 12 13 20 21 28 29 28 29 28 29 28 29 28 29 12 13 19 10 16 17 23 24 30 31 29 30 28 29 27 28 26 27 11 11 12 12 13 14 16 17 12 13 12 13 12 13 12 13 12 13 12 12 13 13 14 15 18 18 14 15 13 14 12 13 11 12 10 11 Expanded 11 11 12 12 14 14 17 18 14 15 14 15 14 15 14 15 14 15 12 12 13 13 15 15 19 10 17 18 15 17 14 15 13 14 12 13 Minimum 114 114 118 118 112 116 124 128 148 152 196 104 192 208 384 416 768 832 118 118 112 112 116 120 132 132 156 160 104 112 192 208 352 384 640 704 L Expanded 114 114 118 118 116 116 128 132 156 160 112 120 224 240 448 480 896 960 118 118 112 112 120 120 136 140 168 172 120 136 224 240 416 448 768 832

Symbol Rate, S

Data Rate, R 12400 12600 14800 15000 17200 17400 19600 19800

K

2400

12 000 12 200 14 400 14 600 16 800 17 000 19 200 19 400 21 600 21 800 14800 15000 17200 17400 19600 19800 12 000 12 200

2743

14 400 14 600 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200

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TABLE 10/V.34 (continued) Mapping parameters K, M and L at different data rates and symbol rates
Symbol Rate, S Data Rate, R 14800 15000 17200 17400 19600 19800 12 000 12 200 2800 14 400 14 600 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200 14800 15000 17200 17400 19600 19800 12 000 12 200 14 400 14 600 3000 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200 26 400 26 600 K Minimum 12 13 19 10 16 16 23 23 30 30 28 29 27 28 26 27 25 26 11 12 18 18 14 15 20 21 27 27 25 26 24 24 30 31 28 29 27 27 12 12 13 13 14 14 18 18 14 14 12 13 11 12 10 11 19 10 12 12 12 12 14 14 16 17 11 11 19 10 18 18 14 15 12 13 11 11 M Expanded 12 12 13 13 15 15 19 19 17 17 14 15 13 14 12 13 11 12 12 12 13 13 14 15 17 18 13 13 11 12 10 10 17 18 14 15 13 13 Minimum 118 118 112 112 116 116 132 132 156 156 196 104 176 192 320 352 576 640 118 118 118 118 116 116 124 128 144 144 172 180 128 128 224 240 384 416 704 704 L Expanded 118 118 112 112 120 120 136 136 168 168 112 120 208 224 384 416 704 768 118 118 112 112 116 120 128 132 152 152 188 196 160 160 272 288 448 480 832 832

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TABLE 10/V.34 (end) Mapping parameters K, M and L at different data rates and symbol rates
Symbol Rate, S Data Rate, R 14800 15000 17200 17400 19600 19800 12 000 12 200 14 400 14 600 3200 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200 26 400 26 600 28 800 29 000 14800 15000 17200 17400 19600 19800 12 000 12 200 14 400 14 600 3429 16 800 17 000 19 200 19 400 21 600 21 800 24 000 24 200 26 400 26 600 28 800 29 000 K Minimum 10 11 16 17 12 13 18 19 24 25 30 31 28 29 26 27 24 25 30 31 28 29 10 10 15 16 11 11 16 17 22 23 28 28 25 26 31 31 28 29 26 27 24 24 11 12 12 12 13 14 15 16 18 19 14 15 12 13 10 11 18 19 14 15 12 13 11 11 12 12 13 13 14 15 17 18 12 12 9 10 15 15 12 13 10 11 18 18 M Expanded 11 12 12 12 14 14 16 16 10 11 17 18 14 15 12 13 10 11 17 18 14 15 11 11 12 12 13 13 15 15 18 19 14 14 11 12 18 18 14 15 12 13 10 10 Minimum 114 118 118 118 112 116 120 124 132 136 156 160 196 104 160 176 256 288 448 480 768 832 114 114 118 118 112 112 116 120 128 132 148 148 172 180 120 120 192 208 320 352 512 512 L Expanded 114 118 118 118 116 116 124 124 140 144 168 172 112 120 192 208 320 352 544 576 896 960 114 114 118 118 112 112 120 120 132 136 156 156 188 196 144 144 224 240 384 416 640 640

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9.3
9.3.1

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Parser
Procedure for b > 12

In high mapping frames (b bits), the first K scrambled primary channel data bits are put into the shell mapper, where the values of K are given in Table 10. In low mapping frames (b ­ 1 bits), a zero bit is inserted after the first K ­ 1 bits, and the resulting K bits are then put into the shell mapper. The first K scrambled data bits in mapping frame i are denoted by (Si,1, Si,2, ..., Si,K). In low frames, Si,K = 0. In each mapping frame the remaining b ­ K bits are divided into four groups of equal size, corresponding to four 4D symbols. The first three bits in each group are denoted by (I1i,j,, I2i,j,, I3i,j,), 0 j 3. (When the auxiliary channel is present, the bit I1i,0 in the first group is either a primary channel bit or an auxiliary channel bit depending on AMP, the Auxiliary Channel Multiplexing Pattern, as explained in 8.3.) The remaining 2q = (b ­ K)/4 ­ 3 bits are divided into two subgroups of size q denoted by (Qi,j,k,1, Qi,j,k,2, ..., Qi,j,k,q), 0 k 1, corresponding to two 2D symbols. Thus, mapping frame i consists of the following sequence of bits: (Si,1, Si,2, ..., Si,K), (I1i,0, I2i,0, I3i,0), (Qi,0,0,1, Qi,0,0,2, ..., Qi,0,0,q), (Qi,0,1,1, Qi,0,1,2, ..., Qi,0,1,q), (I1i,1, I2i,1, I3i,1), (Qi,1,0,1, Qi,1,0,2, ..., Qi,1,0,q), (Qi,1,1,1, Qi,1,1,2, ..., Qi,1,1,q), (I1i,2, I2i,2, I3i,2), (Qi,2,0,1, Qi,2,0,2, ..., Qi,2,0,q), (Qi,2,1,1, Qi,2,1,2, ..., Qi,2,1,q), (I1i,3, I2i,3, I3i,3), (Qi,3,0,1, Qi,3,0,2, ..., Qi,3,0,q), (Qi,3,1,1, Qi,3,1,2, ..., Qi,3,1,q).
NOTE ­ Si,1 is the earliest bit in time, and Qi,3,1,q is the latest.

9.3.2

Procedure for b 12

For this case, K = 0 and the ring indices mi,j,k generated by the shell mapper are always zero. In each mapping frame, the b bits are divided into four groups corresponding to four 4D symbols. The bits in each group are denoted by (I1i,j, I2i,j, I3i,j), 0 j 3. (When the auxiliary channel is present, the bit I1i,0 in the first group is either a primary channel bit or an auxiliary channel bit depending upon AMP, as explained in 8.3.) According to the switching patterns given in Table 8, 8, 9, 11 or 12 bits are transmitted per mapping frame in the following order: 8 bits per mapping frame: 9 bits per mapping frame: 11 bits per mapping frame: 12 bits per mapping frame: (I1i,0, I2i,0, 0), (I1i,1, I2i,1, 0), (I1i,2, I2i,2, 0), (I1i,3, I2i,3, 0) (I1i,0, I2i,0, I3i,0), (I1i,1, I2i,1, 0), (I1i,2, I2i,2, 0), (I1i,3, I2i,3, 0) (I1i,0, I2i,0, I3i,0), (I1i,1, I2i,1, I3i,1), (I1i,2, I2i,2, I3i,2), (I1i,3, I2i,3, 0) (I1i,0, I2i,0, I3i,0), (I1i,1, I2i,1, I3i,1), (I1i,2, I2i,2, I3i,2), (I1i,3, I2i,3, I3i,3)

9.4

Shell Mapper

In every mapping frame, the shell mapper maps K input bits (Si,1, Si,2, ..., Si,K) into 8 output ring indices {mi,0,0, mi,0,1, ..., mi,3,0, mi,3,1}, where 0 mi,j,K < M, according to the algorithm described below which specifies the mapping function between input bits and output indices. The parameters K and M are specified in 9.2.
NOTE ­ Other implementations are possible but the mapping function must be identical to that given in the algorithm described below.

Definitions: g2(p)= M ­ abs[p ­ M + 1] = 0 g4(p)= g2(0)g2(p) + g2(1)g2(p ­ 1) + ... + g2(p)g2(0) = 0 g8(p) = g4(0)g4(p) + g4(1)g4(p ­ 1) + ... + g4(p)g4(0) z8(p) = g8(0) + g8(1) + g8(2) + ... + g8(p ­ 1) 0 p 2(M ­ 1) otherwise 0 p 4(M ­ 1) otherwise 0 p 8(M ­ 1) 0 p 8(M ­ 1)

(9-3/V.34)

(9-4/V.34) (9-5/V.34) (9-6/V.34)

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The algorithm shall first determine 8 integers A, B, C, D, E, F, G, H as follows: 1) Represent the K shell mapping bits by an integer R0 defined by

R0 = Si,1 + 21 · Si,2 + 22 · Si,3 + ... + 2K­1 · Si,K
2) 3) Find the largest integer A for which z8(A) R0. Determine the largest integer B such that R1 0, where

(9-7/V.34)

R1= R0 ­ z8(A) = R0 ­ z8(A) ­
B­1 p=0

if B = 0

g4(p)g4(A ­ p)

if B > 0

(9-8/V.34)

4)

Determine the integers:

R2 = R1 modulo g4(B), where 0 R2 g4(B) ­ 1 R3 = (R1 ­ R2)/g4(B)
5.1) Determine the largest integer C such that R4 0, where

(9-9/V.34) (9-10/V.34)

R4= R2 = R2 ­
C­1 p=0

if C = 0

g2(p)g2(B ­ p)

if C > 0

(9-11/V.34)

5.2) Determine the largest integer D such that R5 0, where

R5= R3 = R3 ­
D­1 p=0

if D = 0

g2(p)g2(A ­ B ­ p)

if D > 0

(9-12/V.34)

6.1) Determine the integers:

E = R4 modulo g2(C), where 0 E g2(C) ­ 1 F = (R4 ­ E)/g2(C)
6.2) Determine the integers:

(9-13/V.34) (9-14/V.34)

G = R5 modulo g2(D), where 0 G g2(D) ­ 1 H = (R5 ­ G)/g2(D)
The ring indices are determined from the integers A, B, C, D, E, F, G, H as follows:

(9-15/V.34) (9-16/V.34)

· · · ·

If C < M, then mi,0,0 = E and mi,0,1 = C ­ mi,0,0 If C M, then mi,0,1 = M ­ 1 ­ E and mi,0,0 = C ­ mi,0,1 If B ­ C < M, then mi,1,0 = F and mi,1,1 = B ­ C ­ mi,1,0 If B ­ C M, then mi,1,1 = M ­ 1 ­ F and mi,1,0 = B ­ C ­ mi,1,1

(9-17/V.34) (9-18/V.34) (9-19/V.34) (9-20/V.34)

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(9-21/V.34) (9-22/V.34) (9-23/V.34) (9-24/V.34)

If D < M, then mi,2,0 = G and mi,2,1 = D ­ mi,2,0 If D M, then mi,2,1 = M ­ 1 ­ G and mi,2,0 = D ­ mi,2,1 If A ­ B ­ D < M, then mi,3,0 = H and mi,3,1 = A ­ B ­ D ­ mi,3,0 If A ­ B ­ D M, then mi,3,1 = M ­ 1 ­ H and mi,3,0 = A ­ B ­ D ­ mi,3,1

9.5

Differential Encoder

In each 4D symbol interval m = 4i + j, the two bits (I2i,j, I3i,j) shall be converted into an integer

I(m) = I2i,j + 2·I3i,j

(9-25/V.34)

A differential encoder shall generate an integer Z(m) as the modulo-4 sum of I(m) and the previously generated integer Z(m ­ 1) as shown in Figure 6.

Modulo-4 addition I(m) Z(m)

Z(m­1)

2T
T1400660-94/d06

FIGURE 6/V.34 Differential Encoder
FIGURE 6/V.34...[D06] = 4 CM (118%)

9.6

Mapper, Precoder and Trellis Encoder

The operations to implement the mapper, precoder and the trellis encoder are interdependent. Table 11 gives a sequence of steps for implementing the operations.

TABLE 11/V.34 Sequence of Operations for Mapper, Precoder and Trellis Encoder
Step 1 2 3 4 5 6 7 8 9 Z(m), v(2m) u(2m), c(2m), p(2m) x(2m) c(2m), c(2m + 1) C0(m), Y0(m), V0(m) Z(m), U0(m), v(2m + 1) u(2m + 1), c(2m + 1), p(2m + 1) x(2m + 1) y(2m), y(2m + 1) Inputs 9.6.1 9.6.2, item 4 9.6.2, items 1-3 9.6.3.3 9.6.3 9.6.1 9.6.2, item 4 9.6.2, items 1-3 9.6.3.1, 9.6.3.2 Operation u(2m) y(2m), x(2m) c(2m + 1), p(2m + 1) C0(m) U0(m) u(2m + 1) y(2m + 1), x(2m + 1) c(2m + 2), p(2m + 2) Y0(m + 1) Outputs

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For each 2D symbol interval n = 8i + 2j + k, from the q-bit subgroup (Qi,j,k,1, Qi,j,k,2, ..., Qi,j,k,q) and the ring index mi,j,k, the mapper shall compute a mapping index Q(n):

Q(n) = Qi,j,k,1 + 21 · Qi,j,k,2 + 22 · Qi,j,k,3 + ... + 2q­1 · Qi,j,k,q + 2q · mi,j,k

(9-26/V.34)

For each 4D symbol interval m = 4i + j, the mapping indices Q(2m) and Q(2m + 1) label two signal points v(2m) and v(2m + 1), respectively, from the quarter superconstellation of Figure 5. The output 2D signal points u(2m) and u(2m + 1) are obtained by rotating v(2m) by Z(m) · 90 degrees clockwise and v(2m + 1) by [Z(m) + 2 · I1i,j + U0(m)] · 90 degrees clockwise, respectively. The bit U0(m) is the output of the trellis encoder, and is obtained according to the method described in 9.6.3.
NOTE ­ For precoding interoperability, it is important that u(2m) and u(2m + 1) are generated exactly.

9.6.2

Precoder

The precoder shown in Figure 7 receives the complex-valued signal points u(n) from the mapper and generates the complex-valued signal x(n) according to:

x(n) = u(n) + c(n) ­ p(n)
u(n) y(n) c(n) Quantize Filter x(n)

(9-27/V.34)

p(n) Round

q(n)
T1400670-94/d07

FIGURE 7/V.34 Block Diagram of Precoder
FIGURE 7/V.34...[D07] = 6 CM (118%) The complex-valued signals c(n) and p(n) are determined according to the algorithm specified below. The precoded signal x(n) is provided to the non-linear encoder and the signals c(n) and y(n) = u(n) + c(n), indicated in Figure 7, are provided to the trellis encoder.
below. NOTE ­ To ensure interoperability, the signals x(n), c(n) and y(n) must be precisely the same as in the algorithm specified

The complex-valued precoding coefficients {h(p), p = 1, 2, 3} are provided by the receiving modem during Phase 4 of the modem start-up procedures described in 11.4. or 12.4. Their real and imaginary components are represented in the 16-bit two's-complement format with 14 bits after the binary point, and assume values in the half-open interval (­2, 2). The coefficients shall be constrained such that the absolute value of the real and imaginary components of y(n) always satisfy abs[yr,i(n)] 255. The precoder shall determine the signals x(n), c(n) and y(n) based on the input u(n), the precoding coefficients {h(p), p = 1, 2, 3} and the three most recent precoded symbols {x(n ­ p), p = 1, 2, 3}, as follows: 1) Compute the filter output using complex arithmetic according to:

q(n) = x(n ­ p)h(p) p=1
2)

3

(9-28/V.34)

Round the real and imaginary components of q(n) to the respective nearest integer multiples of 2­7 to obtain p(n). When a component falls exactly half-way between two integer multiples of 2­7, round it to the one with the smaller magnitude. Recommendation V.34 (09/94) 21

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Quantize the real and imaginary components of p(n) to the respective nearest integer multiple of 2w to obtain c(n). When a component falls exactly half-way between two integer multiples of 2w, quantize it to the one with the smaller magnitude. Here the scale factor w is:

w = 1, when b < 56 = 2, when b 56
where b is the number of bits in a high mapping frame as defined in Table 7. 4) Compute the channel output signal y(n) and the precoded signal x(n) according to:

(9-29/V.34)

y(n) = u(n) + c(n) x(n) = y(n) ­ p(n)
9.6.3 Trellis Encoder

(9-30/V.34) (9-31/V.34)

The trellis encoder shown in Figure 8 generates the bit U0(m) for the mapper once every 4D interval m.

c(2m), c(2m + 1)

Modulo Encoder

C0 (m)
Y4 (m), Y3 (m), y(2m), y(2m + 1) Symbol-to-bit Converter Y2 (m), Y1(m) Convolutional Encoder

Y0 (m)

U0 (m)

V0 (m)

T1400680-94/d08

FIGURE 8/V.34 Block Diagram of Trellis Encoder
FIGURE 8/V.34...[D08] = 6.5 CM (118%) The trellis encoder consists of a convolutional encoder which generates an output bit Y0(m) and a modulo encoder which generates an output bit C0(m). U0(m) is then determined as the modulo 2 sum

U0(m) = Y0(m) C0(m) V0(m)

(9-32/V.34)

where the bit V0(m) represents bit inversions for purposes of superframe synchronization. Bit inversions are introduced in the 4D symbol interval in the beginning of each half data frame (i.e. when m is an integer multiple of 2P), according to the periodic bit inversion pattern specified in Table 12. The left-most bit corresponds to the first half data frame of a superframe. The period of the bit inversion pattern is 16 when J = 8, and 14 when J = 7.

TABLE 12/V.34 Bit inversion patterns
J 8 7 01 01 11 01 01 11 Pattern 11 01 11 11 11 11 10 11 10 10

22

Recommendation V.34

(09/94)

Case 1:07-cv-00170-JJF
9.6.3.1 Symbol-to-Bit Converter

Document 91-2

Filed 04/28/2008

Page 28 of 71

The symbol-to-bit converter generates four bits [Y4(m), Y3(m), Y2(m), Y1(m)] as follows: The complex 2D channel output symbols y(2m) and y(2m + 1) lie on a 2D rectangular grid with odd-integer coordinates. The signal points on the grid are represented by a 3-bit subset label in an 8-way set partition. This labelling of points is shown in Figure 9 for a small subset of the points near the origin.

(lm) 3 001 110 1 100 ­3 101 011 ­1 010 ­3 000 111 100 011 ­1 000 1 001 111 3 110 (Re) 101 010

T1400690-94/d09

FIGURE 9/V.34 Labelling of channel output points y(2m) or y(2m + 1)
FIGURE 9/V.34...[D09] = 7.5 CM (118%)

Two channel output symbols y(2m) and y(2m + 1